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Wed, 04 May 2022 02:48:00 -0700 (PDT) Received: from [172.30.1.41] ([14.32.163.5]) by smtp.gmail.com with ESMTPSA id v17-20020aa78511000000b0050dc762812asm7783628pfn.4.2022.05.04.02.47.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 May 2022 02:48:00 -0700 (PDT) Message-ID: <849ce462-d753-4c10-d5b6-55f5c47a6c29@gmail.com> Date: Wed, 4 May 2022 18:47:55 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v3 10/12] arm64: dts: exynosautov9: add initial cmu clock nodes Content-Language: en-US To: Chanho Park , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski Cc: Sam Protsenko , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org References: <20220504075154.58819-1-chanho61.park@samsung.com> <20220504075154.58819-11-chanho61.park@samsung.com> From: Chanwoo Choi In-Reply-To: <20220504075154.58819-11-chanho61.park@samsung.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22. 5. 4. 16:51, Chanho Park wrote: > Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes. > > Signed-off-by: Chanho Park > --- > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 84 ++++++++++++++++++++ > 1 file changed, 84 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index 807d500d6022..c9cd3774f298 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -6,6 +6,7 @@ > * > */ > > +#include > #include > #include > > @@ -190,6 +191,89 @@ chipid@10000000 { > reg = <0x10000000 0x24>; > }; > > + cmu_peris: clock-controller@10020000 { > + compatible = "samsung,exynosautov9-cmu-peris"; > + reg = <0x10020000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_PERIS_BUS>; > + clock-names = "oscclk", > + "dout_clkcmu_peris_bus"; > + }; > + > + cmu_peric0: clock-controller@10200000 { > + compatible = "samsung,exynosautov9-cmu-peric0"; > + reg = <0x10200000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_PERIC0_BUS>, > + <&cmu_top DOUT_CLKCMU_PERIC0_IP>; > + clock-names = "oscclk", > + "dout_clkcmu_peric0_bus", > + "dout_clkcmu_peric0_ip"; > + }; > + > + cmu_peric1: clock-controller@10800000 { > + compatible = "samsung,exynosautov9-cmu-peric1"; > + reg = <0x10800000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_PERIC1_BUS>, > + <&cmu_top DOUT_CLKCMU_PERIC1_IP>; > + clock-names = "oscclk", > + "dout_clkcmu_peric1_bus", > + "dout_clkcmu_peric1_ip"; > + }; > + > + cmu_fsys2: clock-controller@17c00000 { > + compatible = "samsung,exynosautov9-cmu-fsys2"; > + reg = <0x17c00000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_FSYS2_BUS>, > + <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>, > + <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>; > + clock-names = "oscclk", > + "dout_clkcmu_fsys2_bus", > + "dout_fsys2_clkcmu_ufs_embd", > + "dout_fsys2_clkcmu_ethernet"; > + }; > + > + cmu_core: clock-controller@1b030000 { > + compatible = "samsung,exynosautov9-cmu-core"; > + reg = <0x1b030000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_CORE_BUS>; > + clock-names = "oscclk", > + "dout_clkcmu_core_bus"; > + }; > + > + cmu_busmc: clock-controller@1b200000 { > + compatible = "samsung,exynosautov9-cmu-busmc"; > + reg = <0x1b200000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_BUSMC_BUS>; > + clock-names = "oscclk", > + "dout_clkcmu_busmc_bus"; > + }; > + > + cmu_top: clock-controller@1b240000 { > + compatible = "samsung,exynosautov9-cmu-top"; > + reg = <0x1b240000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>; > + clock-names = "oscclk"; > + }; > + > gic: interrupt-controller@10101000 { > compatible = "arm,gic-400"; > #interrupt-cells = <3>; Reviewed-by: Chanwoo Choi -- Best Regards, Samsung Electronics Chanwoo Choi