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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Qin Jian <qinjian@cqplus1.com>, krzysztof.kozlowski@canonical.com
Cc: robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	tglx@linutronix.de, maz@kernel.org, p.zabel@pengutronix.de,
	linux@armlinux.org.uk, arnd@arndb.de,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v12 4/9] dt-bindings: clock: Add bindings for SP7021 clock driver
Date: Thu, 31 Mar 2022 22:21:24 +0200	[thread overview]
Message-ID: <84d1e5b6-caa5-cf98-a4b2-2f1ca738b795@linaro.org> (raw)
In-Reply-To: <c535be1e977098993850789faceea1db605df81d.1648714851.git.qinjian@cqplus1.com>

On 31/03/2022 10:29, Qin Jian wrote:
> Add documentation to describe Sunplus SP7021 clock driver bindings.
> 
> Signed-off-by: Qin Jian <qinjian@cqplus1.com>
> ---
> Move 'reg' after 'compatible'
> ---
>  .../bindings/clock/sunplus,sp7021-clkc.yaml   |  39 ++++++
>  MAINTAINERS                                   |   2 +
>  include/dt-bindings/clock/sp-sp7021.h         | 112 ++++++++++++++++++
>  3 files changed, 153 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml
>  create mode 100644 include/dt-bindings/clock/sp-sp7021.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml b/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml
> new file mode 100644
> index 000000000..41e73a088
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml
> @@ -0,0 +1,39 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) Sunplus Co., Ltd. 2021
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sunplus SP7021 SoC Clock Controller Binding
> +
> +maintainers:
> +  - Qin Jian <qinjian@cqplus1.com>
> +
> +properties:
> +  compatible:
> +    const: sunplus,sp7021-clkc
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +
> +    clkc: clock-controller@9c000000 {
> +      compatible = "sunplus,sp7021-clkc";
> +      reg = <0x9c000000 0x280>;
> +      #clock-cells = <1>;
> +    };
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 26066f199..5d8b420d0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2744,8 +2744,10 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers)
>  S:	Maintained
>  W:	https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
>  F:	Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml
> +F:	Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml
>  F:	Documentation/devicetree/bindings/reset/sunplus,reset.yaml
>  F:	drivers/reset/reset-sunplus.c
> +F:	include/dt-bindings/clock/sp-sp7021.h
>  F:	include/dt-bindings/reset/sp-sp7021.h
>  
>  ARM/Synaptics SoC support
> diff --git a/include/dt-bindings/clock/sp-sp7021.h b/include/dt-bindings/clock/sp-sp7021.h
> new file mode 100644
> index 000000000..45dac6de8
> --- /dev/null
> +++ b/include/dt-bindings/clock/sp-sp7021.h
> @@ -0,0 +1,112 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (C) Sunplus Technology Co., Ltd.
> + *       All rights reserved.
> + */
> +#ifndef _DT_BINDINGS_CLOCK_SUNPLUS_SP7021_H
> +#define _DT_BINDINGS_CLOCK_SUNPLUS_SP7021_H
> +
> +#define XTAL			27000000
> +
> +/* plls */
> +#define PLL_A			0
> +#define PLL_E			1
> +#define PLL_E_2P5		2
> +#define PLL_E_25		3
> +#define PLL_E_112P5		4
> +#define PLL_F			5
> +#define PLL_TV			6
> +#define PLL_TV_A		7
> +#define PLL_SYS			8
> +
> +/* gates: mo_clken0 ~ mo_clken9 */
> +#define CLK_SYSTEM		0x10
> +#define CLK_RTC			0x12

YAML looks ok, but here comment from Arnd also applies. These should be
regular decimal numbers incremented by one.

Best regards,
Krzysztof

  reply	other threads:[~2022-03-31 20:21 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-31  8:29 [PATCH v12 0/9] Add Sunplus SP7021 SoC Support Qin Jian
2022-03-31  8:29 ` [PATCH v12 1/9] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian
2022-03-31  8:29 ` [PATCH v12 2/9] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian
2022-03-31  8:58   ` Arnd Bergmann
2022-04-01  8:24     ` qinjian[覃健]
2022-03-31  8:29 ` [PATCH v12 3/9] reset: Add Sunplus " Qin Jian
2022-03-31  8:59   ` Arnd Bergmann
2022-03-31  8:29 ` [PATCH v12 4/9] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian
2022-03-31 20:21   ` Krzysztof Kozlowski [this message]
2022-04-01  9:19     ` qinjian[覃健]
2022-04-01  9:32       ` Krzysztof Kozlowski
2022-03-31  8:29 ` [PATCH v12 5/9] clk: Add Sunplus " Qin Jian
2022-03-31  9:22   ` Arnd Bergmann
2022-04-01  9:47     ` qinjian[覃健]
2022-04-01 10:09       ` Arnd Bergmann
2022-04-02  3:37         ` qinjian[覃健]
2022-03-31  8:29 ` [PATCH v12 6/9] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian
2022-03-31 20:44   ` Rob Herring
2022-04-01  2:29     ` qinjian[覃健]
2022-04-01 17:53       ` Rob Herring
2022-04-02  2:43         ` qinjian[覃健]
2022-03-31  8:29 ` [PATCH v12 7/9] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian
2022-03-31  9:17   ` Arnd Bergmann
2022-04-01  7:17     ` qinjian[覃健]
2022-03-31  8:29 ` [PATCH v12 8/9] ARM: sunplus: Add initial support for Sunplus SP7021 SoC Qin Jian
2022-03-31  9:03   ` Arnd Bergmann
2022-03-31  8:29 ` [PATCH v12 9/9] ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig Qin Jian
2022-03-31  9:09   ` Arnd Bergmann
2022-04-01  7:08     ` qinjian[覃健]

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