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Mon, 01 Jul 2024 08:44:14 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4618iDrU021083 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 1 Jul 2024 08:44:13 GMT Received: from [10.131.33.37] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 1 Jul 2024 01:44:08 -0700 Message-ID: <854f324d-c9dc-affc-6f6f-0219bcbc1e1b@quicinc.com> Date: Mon, 1 Jul 2024 14:14:05 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [RFC 4/7] soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs Content-Language: en-US To: Konrad Dybcio , , , , , , CC: , , , , , , Amir Vajid References: <20240117173458.2312669-1-quic_sibis@quicinc.com> <20240117173458.2312669-5-quic_sibis@quicinc.com> <7e48e51e-e16a-41b9-800d-960c627b8da6@linaro.org> <027b9ba8-20b7-4d20-8128-156398f21902@linaro.org> From: Sibi Sankar In-Reply-To: <027b9ba8-20b7-4d20-8128-156398f21902@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: CWScLshh2U-ioLx0yOphkktTcHPB4HGQ X-Proofpoint-ORIG-GUID: CWScLshh2U-ioLx0yOphkktTcHPB4HGQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-01_07,2024-06-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 mlxscore=0 clxscore=1015 suspectscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 adultscore=0 spamscore=0 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407010066 On 6/19/24 01:07, Konrad Dybcio wrote: > > > On 2/12/24 11:33, Sibi Sankar wrote: > > [...] > > >>> >>>> +            monitor->mon_type = (of_property_read_bool(monitor_np, >>>> "qcom,compute-mon")) ? 1 : 0; >>>> +            monitor->ipm_ceil = (of_property_read_bool(monitor_np, >>>> "qcom,compute-mon")) ? 0 : 20000000; >>> >>> What does it even mean for a monitor to be a compute mon? >>> >> >> When a monitor is marked compute-mon it means that the table is >> followed religiously irrespective whether the instruction per miss >> count threshold (ipm) is exceeded or not. Equivalent to having >> a cpufreq map -> l3/DDR bw mapping upstream. > > I'm sorta puzzled why the OS would even be required to program this, since > L3/DDR/CPU frequencies are known by various stages of boot and secure > firmware > too. > > What happens if we omit this? Is the default configuration identical to > this? > Or does it need explicit enabling? CPUCP isn't expected to know the various ranges supported by the memory buses it can vote on and from a sandboxing perspective one would want to control what CPUCP has access to as well. It also can't arrive at the exact values just from the OPP tables we pass on as well. So it doesn't have any default values to start off with. For all these reasons, they need explicit setting up and without it, the algorithm wouldn't function as expected. -Sibi > > Konrad