From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60BF41EF37D; Wed, 2 Apr 2025 11:11:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743592312; cv=none; b=P12qKwBwYfm0EaPphondCGF4IcYMZ/W51OtRGArFe2J7ZwEz2BUE579J+iU8dCSH1ukTc0GSa54gQxpaNziA8tk/uKUt6SB/ncYqk49njggVPtGUkJbetZVbrv9JX4zcaDCXsuUy8JpNyJfradd+rMAv6kOX/Rk5LAc9sfuZJF0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743592312; c=relaxed/simple; bh=UqhKSL65Dxgk2dVyb4tCArOqKN+10TQqPqttHJ0QJO8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=G6V1XTjT9C6BZArYJNoeuGnsUxQ5h3YaLroFo/By86RBpOfUN9x95Vg5+DPxRsLK4BerX14th285qZDRV9o9oTL3lufQ1U/08MnxI/BI7sobui1BCI4XYKoWQkBx4pxDDpRkgwu9PNBuH0Iqy0QWzD8MyFsXVQkRX8a8Yr9t9J0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Js1F89MZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Js1F89MZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00991C4CEDD; Wed, 2 Apr 2025 11:11:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743592311; bh=UqhKSL65Dxgk2dVyb4tCArOqKN+10TQqPqttHJ0QJO8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Js1F89MZ7mNqy+1Rx8WRbvLFGAnn2kyc2xk0D+jRJgnpYglHNNXsre5BwSajoXQfx z/7Xu4ofH+VNbrxEI5IbjrJOkoE0xTlmrWLfz4E9roXufyg/9MaSMoMpV4JdsYxzw6 dLR1Li/2S8SAU5llwUTxs7P38xefN0Rr1OGrSAblHNcJzpFfeb3J3QV/TCKO7LEqs0 X9wkOlEipCmvqyd+482RTngII0StYMWDcxMWTO5EYbqYXMCSPFjbu6UKAhc0RTmnee k2nqn36OmTL57W9u9X8XDLieQAs/ax7pDXmDmjp1pa6gW9jG9JlXDd4Erraijhkr28 dC985VtQWHccA== Message-ID: <860ae623-f33f-4cfe-be08-6bb6524ecf94@kernel.org> Date: Wed, 2 Apr 2025 13:11:43 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: remoteproc: Add VCP support for mt8196 To: Xiangzhi Tang , Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, jjian.zhou@mediatek.com, hailong.fan@mediatek.com References: <20250402092134.12293-1-xiangzhi.tang@mediatek.com> <20250402092134.12293-2-xiangzhi.tang@mediatek.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 02/04/2025 11:19, Xiangzhi Tang wrote: > + > +description: > + The MediaTek VCP enables the SoC control the MediaTek Video Companion Risc-V coprocessor. Wrap at coding style. > + > +properties: > + compatible: > + enum: > + - mediatek,mt8196-vcp > + > + reg: > + items: > + - description: sram base > + - description: cfg group IO > + - description: cfg core group IO > + - description: cfg sec group IO > + - description: vcp rdy group IO > + > + reg-names: > + items: > + - const: sram > + - const: cfg > + - const: cfg_core > + - const: cfg_sec > + - const: vcp_vlp_ao_rsvd7 > + > + interrupts: > + maxItems: 1 > + > + mboxes: > + description: > + Using mailbox to communicate with VCP, it should have this > + property and list of phandle, mailbox specifiers. See > + Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml > + for details. Drop entire description, redundant. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + No, you do not get your own type. Instead list items or just maxItems. > + mbox-names: > + maxItems: 5 No, you must list the items. > + > + power-domains: > + description: > + A phandle and PM domain specifier as defined by bindings > + of the power controller specified by phandle. See > + Documentation/devicetree/bindings/power/power-domain.yaml for details. Look how other bindings do it. Do not repeat obvious stuff, do not develop bindings entirely different than all others. > + maxItems: 1 > + > + iommus: > + description: > + Using MediaTek iommu to apply larb ports for Multimedia Memory > + Management Unit and address translation > + Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml Really, look at other code first. > + > + memory-region: > + maxItems: 1 > + > + vcp-mem-tbl: > + description: > + Manage reserved memory for VCP RTOS FW and various features. No, reserved memory is in memory-region. Drop property. > + $ref: /schemas/types.yaml#/definitions/uint32-array > + minItems: 2 > + maxItems: 12 > + > +patternProperties: > + "^vcp_[a-f0-9]+$": Follow DTS coding style. Heh, nothing here was really tested and you have obvious bugs pointed out by simple testing of DTS. Why these children are needed in the first place? Offsets are implied by parent compatible. > + type: object > + description: > + The MediaTek VCP integrated to SoC might be a multi-core version. > + The other cores are represented as child nodes of the boot core. > + There are some integration differences for the IP like the usage of > + address translator for translating SoC bus addresses into address > + space for the processor. > + > + The SRAM are shared by all cores, each VCP core only using a piece > + SRAM memory. The power of SRAM should be enabled before booting VCP cores. > + The size of SRAM are varied on differnt SoCs. > + > + The VCP cores has differences on different SoCs to support for > + Hart. > + > + properties: > + compatible: > + enum: > + - mediatek,vcp-core > + - mediatek,mmup-core > + > + twohart: Missing vendor prefix, look at writing bindings and other examples. > + enum: [0, 1] > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + sram-offset: > + description: > + Allocated SRAM memory for each VCP core used. > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + required: > + - compatible > + - twohart > + - sram-offset > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - reg-names > + - interrupts > + - mboxes > + - mbox-names > + - power-domains > + - iommus > + - memory-region > + - vcp-mem-tbl > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + vcp: vcp@31800000 { > + compatible = "mediatek,mt8196-vcp"; > + reg = <0x31800000 0x60000>, > + <0x31a04000 0xa000>, > + <0x31bd0000 0x1000>, > + <0x31a70020 0x100>, > + <0x1c00091c 0x4>; Quite different address, are you sure this is still part of this device? Looks like on register. Best regards, Krzysztof