Re: [PATCH 2/6] dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 12/07/2022 10:21, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
> the i.MX8MM VPU blk ctrl yaml file.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml        | 17 ++++++++++++++---
>  include/dt-bindings/power/imx8mp-power.h        |  4 ++++
>  2 files changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
> index 26487daa64d9..edbd267cdd67 100644
> --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
> +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
> @@ -4,20 +4,22 @@
>  $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: NXP i.MX8MM VPU blk-ctrl
> +title: NXP i.MX8MM/P VPU blk-ctrl
>  
>  maintainers:
>    - Lucas Stach <l.stach@pengutronix.de>
>  
>  description:
> -  The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
> +  The i.MX8MM/P VPU blk-ctrl is a top-level peripheral providing access to
>    the NoC and ensuring proper power sequencing of the VPU peripherals
>    located in the VPU domain of the SoC.
>  
>  properties:
>    compatible:
>      items:
> -      - const: fsl,imx8mm-vpu-blk-ctrl
> +      - enum:
> +          - fsl,imx8mm-vpu-blk-ctrl
> +          - fsl,imx8mp-vpu-blk-ctrl
>        - const: syscon
>  
>    reg:
> @@ -47,6 +49,15 @@ properties:
>        - const: g2
>        - const: h1
>  
> +  interconnects:
> +    maxItems: 3

You should describe the items, because g1/g2/h1 are quite cryptic.


Best regards,
Krzysztof