From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A1ACC4167B for ; Thu, 15 Dec 2022 09:22:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229938AbiLOJWm (ORCPT ); Thu, 15 Dec 2022 04:22:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229950AbiLOJWh (ORCPT ); Thu, 15 Dec 2022 04:22:37 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6FF133C28; Thu, 15 Dec 2022 01:22:33 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4120CB81698; Thu, 15 Dec 2022 09:22:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 04B40C433EF; Thu, 15 Dec 2022 09:22:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671096151; bh=zEb0ixyjXY3i78Yi3+jsNaVpreCjlmA3VWVSg0drJSE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=jRmmxySBxYf0VAsyP1TsXAARZHB2dXeW2gHqqLduWtedkH++pcV524GaCkc+Xb1Cr B/6t0G8r89JFLD3MxPx1VMKKqS8eE0WamMtrLjP5ornG+HJi9Y64jVsWqqp3wYeRul 2v5RvIShXhF4H6sRlz2JxhXRfUKiIgO8wcLGjtkXeA6pm4Epf+EIqD4l3Gc5gle+jg Cr1DvhswWEAuRAI3xiAsNg71esyfieMT1Lkx4VkdV42NPRuaH/TgaEQseTK8y0KcbP Y857wr5Wd9vITwDCKTMGADPWDbQFMgogJFwSY3zU+ty7I7k9S6gvRMNQH3/jB20e+S t3nthDD+KjaSA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1p5kRg-00CnyB-Lk; Thu, 15 Dec 2022 09:22:28 +0000 Date: Thu, 15 Dec 2022 09:22:28 +0000 Message-ID: <861qp1qawb.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Reichel Cc: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Linus Walleij , Christopher Obbard , Benjamin Gaignard , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kever Yang , kernel@collabora.com, Yifeng Zhao , Elaine Zhang , Sugar Zhang Subject: Re: [PATCHv6 3/7] arm64: dts: rockchip: Add base DT for rk3588 SoC In-Reply-To: <20221214182247.79824-4-sebastian.reichel@collabora.com> References: <20221214182247.79824-1-sebastian.reichel@collabora.com> <20221214182247.79824-4-sebastian.reichel@collabora.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebastian.reichel@collabora.com, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linus.walleij@linaro.org, chris.obbard@collabora.com, benjamin.gaignard@collabora.com, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, kernel@collabora.com, yifeng.zhao@rock-chips.com, zhangqing@rock-chips.com, sugar.zhang@rock-chips.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, 14 Dec 2022 18:22:43 +0000, Sebastian Reichel wrote: > > From: Kever Yang > > This initial version supports (single core) CPU, dma, interrupts, timers, > UART and SDHCI. In short - everything necessary to boot Linux on this > system on chip. Single core? The DT indicates otherwise. > > The DT is split into rk3588 and rk3588s, which is a reduced version > (i.e. with less peripherals) of the former. > > Signed-off-by: Yifeng Zhao > Signed-off-by: Elaine Zhang > Signed-off-by: Sugar Zhang > Signed-off-by: Kever Yang > [rebase, squash and reword commit message] > Signed-off-by: Sebastian Reichel > --- > arch/arm64/boot/dts/rockchip/rk3588.dtsi | 58 + > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1703 +++++++++++++++++++++ > 2 files changed, 1761 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3588.dtsi > create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s.dtsi > [...] > + gic: interrupt-controller@fe600000 { > + compatible = "arm,gic-v3"; > + reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ > + <0x0 0xfe680000 0 0x100000>; /* GICR */ > + interrupts = ; > + interrupt-controller; > + mbi-alias = <0x0 0xfe610000>; > + mbi-ranges = <424 56>; > + msi-controller; > + #interrupt-cells = <4>; > + > + ppi-partitions { > + ppi_cluster0: interrupt-partition-0 { > + affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; > + }; > + > + ppi_cluster1: interrupt-partition-1 { > + affinity = <&cpu_b0 &cpu_b1 &cpu_b2 &cpu_b3>; The use of the word "cluster" is pretty misleading, specially as the actual CPU clusters don't align with this partitioning (you seem to have 2 independent A76 clusters). Consider using the word "partition", which was chosen exactly to avoid this confusion. Thanks, M. -- Without deviation from the norm, progress is not possible.