devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Saravana Kannan <saravanak@google.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Conor Dooley <conor@kernel.org>, Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v5 7/9] irqchip: Add RISC-V advanced PLIC driver
Date: Fri, 14 Jul 2023 14:35:12 +0100	[thread overview]
Message-ID: <86cz0uvcof.wl-maz@kernel.org> (raw)
In-Reply-To: <CAK9=C2ULxsXednwnoyzYKjQFpe_zBSZ4v0FqUYFnxK2TpbiMtg@mail.gmail.com>

On Fri, 14 Jul 2023 10:35:34 +0100,
Anup Patel <apatel@ventanamicro.com> wrote:
> 
> On Fri, Jul 14, 2023 at 2:31 PM Marc Zyngier <maz@kernel.org> wrote:
> >
> > Anup,
> >
> > On Fri, 14 Jul 2023 00:56:22 +0100,
> > Saravana Kannan <saravanak@google.com> wrote:
> > >
> > > On Mon, Jul 10, 2023 at 2:44 AM Anup Patel <apatel@ventanamicro.com> wrote:
> > > >
> > > > The RISC-V advanced interrupt architecture (AIA) specification defines
> > > > a new interrupt controller for managing wired interrupts on a RISC-V
> > > > platform. This new interrupt controller is referred to as advanced
> > > > platform-level interrupt controller (APLIC) which can forward wired
> > > > interrupts to CPUs (or HARTs) as local interrupts OR as message
> > > > signaled interrupts.
> > > > (For more details refer https://github.com/riscv/riscv-aia)
> > > >
> > > > This patch adds an irqchip driver for RISC-V APLIC found on RISC-V
> > > > platforms.
> > > >
> > > > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> >
> > [...]
> >
> > > > +static int __init aplic_dt_init(struct device_node *node,
> > > > +                               struct device_node *parent)
> > > > +{
> > > > +       /*
> > > > +        * The APLIC platform driver needs to be probed early
> > > > +        * so for device tree:
> > > > +        *
> > > > +        * 1) Set the FWNODE_FLAG_BEST_EFFORT flag in fwnode which
> > > > +        *    provides a hint to the device driver core to probe the
> > > > +        *    platform driver early.
> > > > +        * 2) Clear the OF_POPULATED flag in device_node because
> > > > +        *    of_irq_init() sets it which prevents creation of
> > > > +        *    platform device.
> > > > +        */
> > > > +       node->fwnode.flags |= FWNODE_FLAG_BEST_EFFORT;
> > >
> > > Please stop spamming us with broken patches. Already told you this is
> > > not an option.
> > >
> > > Nack.
> >
> > What puzzles me here is that *no other arch* requires this sort of
> > hack. What is so special about the APLIC that it requires it? I see
> > nothing in this patch that even hints at it, despite the "discussion"
> > in the last round.
> >
> > The rules are simple:
> >
> > - either the APLIC is so fundamental to the system that it has to be
> >   initialised super early, much like the GIC on arm64, at which point
> >   it cannot be a platform device, and the story is pretty simple.
> >
> > - or it isn't that fundamental, and it can be probed as a platform
> >   device using the dependency infrastructure that is already used by
> >   multiple other interrupt controller drivers, without any need to
> >   mess with internal flags. Again, this should be simple enough.
> 
> APLIC manages all wired interrupts whereas IMSIC manages all
> MSIs. Both APLIC and IMSIC are fundamental devices which need
> to be probed super early.
> 
> Now APLIC has two modes of operations:
> 1) Direct mode where there is no IMSIC in the system and APLIC
>     directly injects interrupt to CPUs
> 2) MSI mode where IMSIC is present in the system and APLIC
>     converts wired interrupts into MSIs
> 
> The APLIC driver added by this patch is a common driver for
> both above modes.

Which it doesn't need to be. You are pointlessly making life difficult
for yourself, and everyone else. The MSI bridge behaviour has *zero*
reason to be the same driver as the main "I need it super early"
driver. They may be called the same, but they *are* different things
in the system.

They can share code, but they are fundamentally a different thing in
the system. And I guess this silly approach has other ramifications:
the IMSIC is also some early driver when it really doesn't need to be.
Who needs MSIs that early in the life of the system? I don't buy this
for even a second.

Frankly, this whole thing needs to be taken apart and rebuilt from the
ground up.

> For #2, APLIC needs to be a platform device to create a device
> MSI domain using platform_msi_create_device_domain() which
> is why the APLIC driver is a platform driver.

You can't have your cake and eat it. If needed super early, and it
cannot be a platform driver. End of the story.

And to my earlier point: IMSIC and APLIC-as-MSI-bridge have no purpose
being early drivers. They must be platform drivers, and only that.

> > If these rules don't apply to your stuff, please explain what is so
> > different. And I mean actually explain the issue. Which isn't telling
> > us "it doesn't work without it". Because as things stand, there is no
> > way I will even consider taking this ugly mix of probing methods.
> 
> Yes, I don't want this ugly FWNODE_FLAG_BEST_EFFORT hack
> in this driver.

And yet you are hammering it even when told this is wrong.

> I tried several things but setting the FWNODE_FLAG_BEST_EFFORT
> flag is the only thing which works right now.

How about you take a step back and realise that the way you've
architected your drivers makes little sense? I don't think you have
tried *that*.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2023-07-14 13:35 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10  9:43 [PATCH v5 0/9] Linux RISC-V AIA Support Anup Patel
2023-07-10  9:43 ` [PATCH v5 1/9] RISC-V: Add riscv_fw_parent_hartid() function Anup Patel
2023-07-11 13:26   ` Andrew Jones
2023-07-17  5:04     ` Anup Patel
2023-07-10  9:43 ` [PATCH v5 2/9] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-07-11 14:12   ` Andrew Jones
2023-07-17  6:38     ` Anup Patel
2023-07-10  9:43 ` [PATCH v5 3/9] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-07-10  9:43 ` [PATCH v5 4/9] irqchip: Add RISC-V incoming MSI controller driver Anup Patel
2023-07-10  9:43 ` [PATCH v5 5/9] irqchip/riscv-imsic: Add support for PCI MSI irqdomain Anup Patel
2023-07-10  9:43 ` [PATCH v5 6/9] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-07-10  9:43 ` [PATCH v5 7/9] irqchip: Add RISC-V advanced PLIC driver Anup Patel
2023-07-13 23:56   ` Saravana Kannan
2023-07-14  9:01     ` Marc Zyngier
2023-07-14  9:35       ` Anup Patel
2023-07-14 13:35         ` Marc Zyngier [this message]
2023-07-14 14:05           ` Anup Patel
2023-07-17  8:05             ` Marc Zyngier
2023-07-17  9:05               ` Anup Patel
2023-07-17  9:36                 ` Anup Patel
2023-07-17  9:48                 ` Marc Zyngier
2023-07-10  9:43 ` [PATCH v5 8/9] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-07-10  9:43 ` [PATCH v5 9/9] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=86cz0uvcof.wl-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=apatel@ventanamicro.com \
    --cc=atishp@atishpatra.org \
    --cc=conor@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=saravanak@google.com \
    --cc=sunilvl@ventanamicro.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).