From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1245940681D; Thu, 30 Jul 2026 12:18:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785413933; cv=none; b=BUgr0P/sUmQ1iWMOOWbZ8eyEiD8CxAV/z08YL82tFK44X69Dj7iKhSKbWCurZgTJYGSLFM3NUgxmWVUDNwF4NknLIPB1cmmqx+JjNNrqwkNEEVSUw6i9lssU8vi8JoqppBjJ9NBoNy/MqELFpBGZKAdPcXjT8uw780exUYPkiNQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785413933; c=relaxed/simple; bh=jVPKa2VaoVV9XjaEVU/GwnBOp3DCoHvHFOl5tHZekJQ=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ppAdgGiyt7wv2jIl9+Rg/1aTXkFb9lYdD2Y87vtMRrxCya8P5ZS02XmL/D30HVcYAOs3Fa+E5qAziYpMXxjJ545iDyX/gefUNfB+GkpAbEpuVnN6SdaDSP3so11PQuhluvSoFacIz1nNomh5lyLOZ9WuyaONxILkur1HkWSyEiQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IERn+3yT; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IERn+3yT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E3D301F000E9; Thu, 30 Jul 2026 12:18:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785413932; bh=J51ZKPd6o6/BUGHko+ufxpPLTQ3XMe+QO50MAUxdiFE=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=IERn+3yT3GKAwlEz98+hOOx2EELH5lepwtkHN1LPJPtSbBcaqZH8R70BuuTlh0A/8 k5n++E+0Q+jQMwVMJ5nkn/Xd6iHEoJJnvs/YUNaRar4FAS8vlAs7p1Q/fuvnhnBKEA NFTW/P6d+tNp6ozLVFlHrQGpnzNz5ygDa67uINaflNJeY3CLZ5ETiif99Fwy2t+40S mADy0iBff6NfDgZyxfiJ4G7MyoPoL3GzrPyU60gqBkwNQq9DeSwXGb7lfNYpiyyPt/ Mqm37WJE36T0QKo6JWfmlIp+mvylB5nxq7lzE2+1q9NZiL1TBlFFhRx//2VevGaH8G ACuAsWAw8gANg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wpPir-0000000AWIY-1wZS; Thu, 30 Jul 2026 12:18:49 +0000 Date: Thu, 30 Jul 2026 13:18:49 +0100 Message-ID: <86ldasd61i.wl-maz@kernel.org> From: Marc Zyngier To: Long Zhao Cc: Arnd Bergmann , Alexandre Belloni , , , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , "Michael\ Turquette" , Stephen Boyd , , Linus Walleij , , Greg Kroah-Hartman , Jiri Slaby , , Catalin Marinas , Will Deacon , Subject: Re: [PATCH 09/10] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT In-Reply-To: <20260730104330.81367-10-longzhao@ambarella.com> References: <20260730104330.81367-1-longzhao@ambarella.com> <20260730104330.81367-10-longzhao@ambarella.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: longzhao@ambarella.com, arnd@arndb.de, alexandre.belloni@bootlin.com, linux-arm-kernel@lists.infradead.org, soc@lists.linux.dev, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, linusw@kernel.org, linux-gpio@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, linux-serial@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 30 Jul 2026 11:43:29 +0100, Long Zhao wrote: [...] > diff --git a/arch/arm64/boot/dts/ambarella/cv75.dtsi b/arch/arm64/boot/dts/ambarella/cv75.dtsi > new file mode 100644 > index 000000000000..7c6a61f473ef > --- /dev/null > +++ b/arch/arm64/boot/dts/ambarella/cv75.dtsi > @@ -0,0 +1,151 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Ambarella CV75 SoC > + * > + * Boot peripheral: UART0 console. > + * Clocks: a single ambarella,cv75-rct provider. > + */ > + [...] > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = , > + , > + , > + ; > + }; You are missing the EL2 virtual timer interrupt, which is provided by Cortex-A76. This isn't optional. A recent Linux kernel will shout at you at boot time when booted at EL2 if this interrupt isn't present. M. -- Without deviation from the norm, progress is not possible.