From: Pratyush Yadav <pratyush@kernel.org>
To: "Miquel Raynal (Schneider Electric)" <miquel.raynal@bootlin.com>
Cc: "Mark Brown" <broonie@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Vaishnav Achath" <vaishnav.a@ti.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Hervé Codina" <herve.codina@bootlin.com>,
"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Santhosh Kumar K" <s-k6@ti.com>,
"Pratyush Yadav" <pratyush@kernel.org>,
"Pascal Eberhard" <pascal.eberhard@se.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH 03/13] spi: cadence-qspi: Fix style and improve readability
Date: Tue, 23 Dec 2025 15:28:13 +0100 [thread overview]
Message-ID: <86pl85b7cy.fsf@kernel.org> (raw)
In-Reply-To: <20251219-schneider-6-19-rc1-qspi-v1-3-8ad505173e44@bootlin.com> (Miquel Raynal's message of "Fri, 19 Dec 2025 20:22:05 +0100")
On Fri, Dec 19 2025, Miquel Raynal (Schneider Electric) wrote:
> It took me several seconds to correctly understand this block. I
> understand the goal: showing that we are in the if, or in one of the two
> other cases. Improve the organization of the code to both improve
> readability and fix the style.
>
> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
> ---
> drivers/spi/spi-cadence-quadspi.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index e16a591e1f20..90387757fb6b 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -376,13 +376,13 @@ static irqreturn_t cqspi_irq_handler(int this_irq, void *dev)
> complete(&cqspi->transfer_complete);
> return IRQ_HANDLED;
> }
> + } else {
> + if (!cqspi->slow_sram)
> + irq_status &= CQSPI_IRQ_MASK_RD | CQSPI_IRQ_MASK_WR;
> + else
> + irq_status &= CQSPI_REG_IRQ_WATERMARK | CQSPI_IRQ_MASK_WR;
> }
>
> - else if (!cqspi->slow_sram)
> - irq_status &= CQSPI_IRQ_MASK_RD | CQSPI_IRQ_MASK_WR;
> - else
> - irq_status &= CQSPI_REG_IRQ_WATERMARK | CQSPI_IRQ_MASK_WR;
> -
I suppose you can further simplify the if-else chain to:
if (cqspi->use_dma_read && ddata && ddata->get_dma_status) {
irq_status = ddata->get_dma_status(cqspi);
else if (cqspi->slow_sram)
irq_status &= CQSPI_REG_IRQ_WATERMARK | CQSPI_IRQ_MASK_WR;
else
irq_status &= CQSPI_IRQ_MASK_RD | CQSPI_IRQ_MASK_WR;
if (irq_status)
complete(&cqspi->transfer_complete);
return IRQ_HANDLED;
Note that I swapped the latter two if statements to get rid of the
unnecessary negation of slow_sram. I suppose the overloading of
irq_status isn't the nicest thing, but I still find this easier to read.
> if (irq_status)
> complete(&cqspi->transfer_complete);
--
Regards,
Pratyush Yadav
next prev parent reply other threads:[~2025-12-23 14:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 19:22 [PATCH 00/13] spi: cadence-qspi: Add Renesas RZ/N1 support Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 01/13] spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list Miquel Raynal (Schneider Electric)
2025-12-20 9:35 ` Krzysztof Kozlowski
2025-12-20 10:13 ` Wolfram Sang
2025-12-19 19:22 ` [PATCH 02/13] spi: cadence-qspi: Align definitions Miquel Raynal (Schneider Electric)
2025-12-23 14:18 ` Pratyush Yadav
2025-12-19 19:22 ` [PATCH 03/13] spi: cadence-qspi: Fix style and improve readability Miquel Raynal (Schneider Electric)
2025-12-23 14:28 ` Pratyush Yadav [this message]
2025-12-19 19:22 ` [PATCH 04/13] spi: cadence-qspi: Fix ORing style and alignments Miquel Raynal (Schneider Electric)
2025-12-23 14:29 ` Pratyush Yadav
2025-12-19 19:22 ` [PATCH 05/13] spi: cadence-qspi: Remove an useless operation Miquel Raynal (Schneider Electric)
2025-12-23 14:32 ` Pratyush Yadav
2025-12-19 19:22 ` [PATCH 06/13] spi: cadence-qspi: Make sure we filter out unsupported ops Miquel Raynal
2025-12-23 14:33 ` Pratyush Yadav
2025-12-19 19:22 ` [PATCH 07/13] spi: cadence-qspi: Fix probe error path and remove Miquel Raynal (Schneider Electric)
2025-12-22 12:48 ` Geert Uytterhoeven
2025-12-19 19:22 ` [PATCH 08/13] spi: cadence-qspi: Try hard to disable the clocks Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 09/13] spi: cadence-qspi: Kill cqspi_jh7110_clk_init Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 10/13] spi: cadence-qspi: Add a flag for controllers without indirect access support Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 11/13] spi: cadence-qspi: Make sure write protection is disabled Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 12/13] spi: cadence-qspi: Add support for the Renesas RZ/N1 controller Miquel Raynal (Schneider Electric)
2025-12-19 19:22 ` [PATCH 13/13] ARM: dts: r9a06g032: Describe the QSPI controller Miquel Raynal (Schneider Electric)
2025-12-20 9:36 ` Krzysztof Kozlowski
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