From: Marc Zyngier <maz@kernel.org>
To: Douglas Anderson <dianders@chromium.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
wenst@chromium.org, Eddie Huang <eddie.huang@mediatek.com>,
Allen-KH Cheng <allen-kh.cheng@mediatek.com>,
Ben Ho <Ben.Ho@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
linux-arm-kernel@lists.infradead.org,
Tinghan Shen <tinghan.shen@mediatek.com>,
jwerner@chromium.org,
Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>,
yidilin@chromium.org, Seiya Wang <seiya.wang@mediatek.com>,
Conor Dooley <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/6] arm64: dts: mediatek: mt8183: Add mediatek,gicr-save-quirk
Date: Fri, 12 May 2023 09:13:06 +0100 [thread overview]
Message-ID: <86ttwim0h9.wl-maz@kernel.org> (raw)
In-Reply-To: <20230511150539.3.I525a2ed4260046d43c885ee1275e91707743df1c@changeid>
On Thu, 11 May 2023 23:05:37 +0100,
Douglas Anderson <dianders@chromium.org> wrote:
>
> Firmware shipped on mt8183 Chromebooks is affected by the GICR
> save/restore issue as described by the patch ("dt-bindings:
> interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/
> broken FW"). Add the quirk property.
>
> Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5169779d01df..39545172fce5 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -709,6 +709,7 @@ gic: interrupt-controller@c000000 {
> <0 0x0c400000 0 0x2000>, /* GICC */
> <0 0x0c410000 0 0x1000>, /* GICH */
> <0 0x0c420000 0 0x2000>; /* GICV */
> + mediatek,gicr-save-quirk;
Is that something you can safely generalise at the SoC level? Are
these SoC solely used on Chromebooks, and/or without any hope of
seeing any alternative FW being already in use?
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2023-05-12 8:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-11 22:05 [PATCH 0/6] irqchip/gic-v3: Disable pseudo NMIs on Mediatek Chromebooks w/ bad FW Douglas Anderson
2023-05-11 22:05 ` [PATCH 1/6] dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW Douglas Anderson
2023-05-11 22:37 ` Julius Werner
2023-05-12 11:32 ` Matthias Brugger
2023-05-12 8:02 ` Marc Zyngier
2023-05-12 13:40 ` Doug Anderson
2023-05-11 22:05 ` [PATCH 2/6] irqchip/gic-v3: Disable pseudo NMIs on Mediatek devices w/ firmware issues Douglas Anderson
2023-05-11 22:38 ` Julius Werner
2023-05-11 22:05 ` [PATCH 3/6] arm64: dts: mediatek: mt8183: Add mediatek,gicr-save-quirk Douglas Anderson
2023-05-11 22:38 ` Julius Werner
2023-05-12 8:13 ` Marc Zyngier [this message]
2023-05-12 14:15 ` Doug Anderson
2023-05-15 11:29 ` AngeloGioacchino Del Regno
2023-05-11 22:05 ` [PATCH 4/6] arm64: dts: mediatek: mt8186: " Douglas Anderson
2023-05-11 22:38 ` Julius Werner
2023-05-11 22:05 ` [PATCH 5/6] arm64: dts: mediatek: mt8192: " Douglas Anderson
2023-05-11 22:38 ` Julius Werner
2023-05-11 22:05 ` [PATCH 6/6] arm64: dts: mediatek: mt8195: " Douglas Anderson
2023-05-11 22:38 ` Julius Werner
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