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Tue, 16 Sep 2025 10:45:19 +0000 Date: Tue, 16 Sep 2025 11:45:15 +0100 Message-ID: <86v7li1xs4.wl-maz@kernel.org> From: Marc Zyngier To: Kuninori Morimoto Cc: "Liang, Kan" , Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Catalin Marinas , Conor Dooley , Douglas Anderson , Geert Uytterhoeven , Ian Rogers , Ingo Molnar , James Clark , Jiri Olsa , John Garry , Krzysztof Kozlowski , Leo Yan , Lorenzo Pieralisi , Mark Rutland , Mike Leach , Namhyung Kim , Oliver Upton , Peter Zijlstra , Rob Herring , Shameer Kolothum , Will Deacon , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH v3 5/6] arm64: dts: renesas: Add R8A78000 X5H DTs In-Reply-To: <87ms6vi0js.wl-kuninori.morimoto.gx@renesas.com> References: <87tt13i0lh.wl-kuninori.morimoto.gx@renesas.com> <87ms6vi0js.wl-kuninori.morimoto.gx@renesas.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kuninori.morimoto.gx@renesas.com, kan.liang@linux.intel.com, adrian.hunter@intel.com, alexander.shishkin@linux.intel.com, acme@kernel.org, catalin.marinas@arm.com, conor+dt@kernel.org, dianders@chromium.org, geert+renesas@glider.be, irogers@google.com, mingo@redhat.com, james.clark@linaro.org, jolsa@kernel.org, john.g.garry@oracle.com, krzk+dt@kernel.org, leo.yan@linux.dev, lpieralisi@kernel.org, mark.rutland@arm.com, mike.leach@linaro.org, namhyung@kernel.org, oliver.upton@linux.dev, peterz@infradead.org, robh@kernel.org, shameerali.kolothum.thodi@huawei.com, will@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 16 Sep 2025 03:38:47 +0100, Kuninori Morimoto wrote: > > From: Hai Pham > > Add initial DT support for R8A78000 (R-Car X5H) SoC. > > [Kuninori: tidyup for upstreaming] > > Signed-off-by: Hai Pham > Signed-off-by: Vinh Nguyen > Signed-off-by: Minh Le > Signed-off-by: Huy Bui > Signed-off-by: Khanh Le > Signed-off-by: Phong Hoang > Signed-off-by: Kuninori Morimoto > --- > arch/arm64/boot/dts/renesas/r8a78000.dtsi | 756 ++++++++++++++++++++++ > 1 file changed, 756 insertions(+) > create mode 100644 arch/arm64/boot/dts/renesas/r8a78000.dtsi > > diff --git a/arch/arm64/boot/dts/renesas/r8a78000.dtsi b/arch/arm64/boot/dts/renesas/r8a78000.dtsi > new file mode 100644 > index 0000000000000..82e27ce39c127 > --- /dev/null > +++ b/arch/arm64/boot/dts/renesas/r8a78000.dtsi [...] > + soc: soc { > + compatible = "simple-bus"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + prr: chipid@189e0044 { > + compatible = "renesas,prr"; > + reg = <0 0x189e0044 0 4>; > + }; > + > + /* > + * The ARM GIC-720AE - View 1 > + * > + * see > + * r19uh0244ej0052-r-carx5h.pdf > + * - attachments: 002_R-CarX5H_Address_Map_r0p51.xlsx > + * - sheet [RT] > + * - line 619 Are these documents publicly available? If not, I don't think this helps much. > + */ > + gic: interrupt-controller@39000000 { > + compatible = "arm,gic-v3"; > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupt-controller; > + reg = <0 0x39000000 0 0x20000>, // GICD > + <0 0x39080000 0 0x40000>; // GICR In v2, you indicated that your GIC was configured for GICv4.1, which implied 256kB frames for each redistributor. Here, you have either just enough space for 32 RDs for a GICv3, or 16 RDs for GICv4. So either this is wrong, and you're missing half of the RD space, or v2 was wrong. Which one is it? > + interrupts = ; No ITS? That seems... surprising. > + }; [...] > + timer { > + compatible = "arm,armv8-timer"; > + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; > + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", > + "hyp-virt"; > + }; Why use interrupts-extended here? Everywhere else, you're using the basic interrupt specifier. Can't you move the interrupt-parent property to the top and simplify the timer (and everything else outside of the 'soc' node? Thanks, M. -- Without deviation from the norm, progress is not possible.