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From: Thomas Gleixner <tglx@linutronix.de>
To: "Anup Patel" <apatel@ventanamicro.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Jassi Brar" <jassisinghbrar@gmail.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Uwe Kleine-König" <ukleinek@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Len Brown <lenb@kernel.org>, Sunil V L <sunilvl@ventanamicro.com>,
	Rahul Pathak <rpathak@ventanamicro.com>,
	Leyfoon Tan <leyfoon.tan@starfivetech.com>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: Re: [RFC PATCH v2 11/17] irqchip: Add driver for the RISC-V RPMI system MSI service group
Date: Mon, 03 Feb 2025 14:50:25 +0100	[thread overview]
Message-ID: <871pwfp272.ffs@tglx> (raw)
In-Reply-To: <20250203084906.681418-12-apatel@ventanamicro.com>

On Mon, Feb 03 2025 at 14:19, Anup Patel wrote:
> +
> +struct rpmi_sysmsi_priv {
> +	struct device *dev;
> +	struct mbox_client client;
> +	struct mbox_chan *chan;
> +	u32 nr_irqs;
> +	u32 gsi_base;
> +};

AS requested before please use tabular layout for structs:

https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#struct-declarations-and-initializers
 
> +static int rpmi_sysmsi_set_msi_state(struct rpmi_sysmsi_priv *priv,
> +				     u32 sys_msi_index, u32 sys_msi_state)
> +{
> +	struct rpmi_sysmsi_set_msi_state_tx tx;
> +	struct rpmi_sysmsi_set_msi_state_rx rx;
> +	struct rpmi_mbox_message msg;
> +	int ret;
> +
> +	tx.sys_msi_index = sys_msi_index;
> +	tx.sys_msi_state = sys_msi_state;
> +	rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_SET_MSI_STATE,
> +					  &tx, sizeof(tx), &rx, sizeof(rx));
> +	ret = rpmi_mbox_send_message(priv->chan, &msg);
> +	if (ret)
> +		return ret;
> +	if (rx.status)
> +		return rpmi_to_linux_error(rx.status);
> +
> +	return 0;
> +}
> +
> +#define rpmi_sysmsi_mask(__priv, __msi_index)		\
> +	rpmi_sysmsi_set_msi_state(__priv, __msi_index, 0)
> +#define rpmi_sysmsi_unmask(__priv, __msi_index)		\
> +	rpmi_sysmsi_set_msi_state(__priv, __msi_index, RPMI_SYSMSI_MSI_STATE_ENABLE)

These macros are not really providing any value.

> +static void rpmi_sysmsi_irq_mask(struct irq_data *d)
> +{
> +	struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
> +	int ret;
> +
> +	ret = rpmi_sysmsi_mask(priv, d->hwirq);
> +	if (ret)
> +		dev_warn(priv->dev, "Failed to mask hwirq %d (error %d)\n",
> +			 (u32)d->hwirq, ret);

        if (ret) {
        	....
        }

https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#bracket-rules

> +	irq_chip_mask_parent(d);
> +}

Other than those nits, this looks reasonable.

Thanks,

        tglx

  reply	other threads:[~2025-02-03 13:50 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-03  8:48 [RFC PATCH v2 00/17] Linux SBI MPXY and RPMI drivers Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 01/17] riscv: Add new error codes defined by SBI v3.0 Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 02/17] dt-bindings: mailbox: Add bindings for RPMI shared memory transport Anup Patel
2025-02-03 22:30   ` Rob Herring
2025-05-02  9:15     ` Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 03/17] dt-bindings: mailbox: Add bindings for RISC-V SBI MPXY extension Anup Patel
2025-02-03 22:44   ` Rob Herring
2025-02-06 12:32     ` Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 04/17] RISC-V: Add defines for the SBI message proxy extension Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 05/17] mailbox: Add common header for RPMI messages sent via mailbox Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 06/17] mailbox: Allow controller specific mapping using fwnode Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 07/17] mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 08/17] dt-bindings: clock: Add bindings for RISC-V RPMI clock service group Anup Patel
2025-02-03 22:51   ` Rob Herring
2025-05-04 10:30     ` Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 09/17] clk: Add clock driver for the " Anup Patel
2025-02-03  8:48 ` [RFC PATCH v2 10/17] dt-bindings: interrupt-controller: Add bindings for RISC-V RPMI system MSI Anup Patel
2025-02-03 22:58   ` Rob Herring
2025-05-04 10:44     ` Anup Patel
2025-02-03  8:49 ` [RFC PATCH v2 11/17] irqchip: Add driver for the RISC-V RPMI system MSI service group Anup Patel
2025-02-03 13:50   ` Thomas Gleixner [this message]
2025-02-06 12:17     ` Anup Patel
2025-02-03  8:49 ` [RFC PATCH v2 12/17] ACPI: property: Add support for nargs_prop in acpi_fwnode_get_reference_args() Anup Patel
2025-02-03  9:43   ` Andy Shevchenko
2025-02-03 10:58     ` Mika Westerberg
2025-02-03 12:24       ` Sunil V L
2025-02-03 12:36         ` Mika Westerberg
2025-02-03 13:51           ` Sunil V L
2025-02-03 14:39             ` Andy Shevchenko
2025-02-03 14:41               ` Andy Shevchenko
2025-02-04 16:58                 ` Sunil V L
2025-02-04 17:36                   ` Andy Shevchenko
2025-02-03  8:49 ` [RFC PATCH v2 13/17] ACPI: scan: Update honor list for RPMI System MSI Anup Patel
2025-02-03  8:49 ` [RFC PATCH v2 14/17] ACPI: RISC-V: Add RPMI System MSI to GSI mapping Anup Patel
2025-02-03  8:49 ` [RFC PATCH v2 15/17] mailbox/riscv-sbi-mpxy: Add ACPI support Anup Patel
2025-02-03  9:45   ` Andy Shevchenko
2025-02-03  8:49 ` [RFC PATCH v2 16/17] irqchip/riscv-rpmi-sysmsi: " Anup Patel
2025-02-03  9:38   ` Andy Shevchenko
2025-02-04  4:18     ` Sunil V L
2025-02-03 13:52   ` Thomas Gleixner
2025-02-03  8:49 ` [RFC PATCH v2 17/17] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig Anup Patel

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