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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-369e8dbaa42sm1633083eec.21.2026.10.23.16.20.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 16:20:44 -0700 (PDT) Message-ID: <8741d667-efdd-4e3f-a1b2-2f04255d7c7d@oss.qualcomm.com> Date: Fri, 23 Oct 2026 16:20:42 -0700 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] phy: core: add generic MIPI C-PHY configuration API To: Bryan O'Donoghue , david@ixit.cz, andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, bod@kernel.org, vladimir.zapolskiy@linaro.org, loic.poulain@oss.qualcomm.com, mchehab@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, gjorgji.rosikopulos@oss.qualcomm.com, jigarkumar.zala@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, linux-media@vger.kernel.org, krzysztof.kozlowski@oss.qualcomm.com, daniel@quora.org, konrad.dybcio@oss.qualcomm.com, christopher.obbard@linaro.org, alex.vinarskis@gmail.com References: <20261017041733.3946816-1-anusha.nandi@oss.qualcomm.com> <20261017041733.3946816-2-anusha.nandi@oss.qualcomm.com> Content-Language: en-US From: Anusha Arun Nandi In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDA5MiBTYWx0ZWRfXyGIsW5TsF7LN TJSLz60qeKdWO3vKrBFnRLhwwsUZfDkYerSFzdupJqDBvkJbRFQIS1EbxI9I+jbNaOkSeoYWyas ALsQ406KGHNBWBSu/+4L1rHkXBC2QSc= X-Proofpoint-ORIG-GUID: fnRNLUqpluIPJ4A2YAqRo5KvxkjJTGNt X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDA5MiBTYWx0ZWRfX8SgDU+85iv+V SRBbGSUUis3aEOUDLVnkZFVDh7HUJCZvA4wpG6kTdLaLriCGJZhxFHh2XxNoZqJck3TctgxiqvL gNp1aCYnOoKUEgwyD3oKNobS+IL7ByayWdgA4bgErYn0KSqHSp/ZWpStZ7umLu4PgMJAYmOLXmL ck0J0eROohfWQEUQ3zQPitFMlwVQXZtxSsMec99/IW7+oujcRyQlWCUPT/lYsXyNfI/C+EvPsrS oOGI2DclNDCspxrFc4y+gVoNdIaAPBJ/Wb3DxyHlWlh5TUx+mP3xTK/pFK0kohLuBnclH8d1qPO PYcV4n1xkGerEZYHmysWKA38feoIBFIBjb9ZBzLud1J+UQjzX7iUQHWJ3FjQCb3VnSXrxrW6N5J 8i4SPnJCaNrYshTjXqp9hHm6/I2FFhMdixeSFMQOI4oWgk6BXEaB3/7DTGImfpZ+aYp90ZKCYrT mxUUVtgMGmve8Xx1RUQ== X-Authority-Analysis: v=2.4 cv=E7lYNqdl c=1 sm=1 tr=0 ts=6adbebce cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=0dgAZyHGDfjHxxwXnN0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: fnRNLUqpluIPJ4A2YAqRo5KvxkjJTGNt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_06,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 adultscore=0 phishscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230092 On 10/22/2026 7:15 PM, Bryan O'Donoghue wrote: > On 23/10/2026 01:33, Anusha Arun Nandi wrote: >>>> +    if (!cfg || !lanes) >>>> +        return -EINVAL; >>> Lanes must be a multiple of three to be valid, at least for your three >>> submissions to be logically consistent, this statement must be so. >>> >> I will update the name of lanes to data_lanes in >> phy_configure_opts_mipi_cphy struct. >> I will add more sanity checks for data_lanes > 3, as C-PHY supports 3 >> data lanes only. > > Sorry the only thing weirder than arguing with other people on the > internet is arguing with yourself. > > I argued myself down from this. > > => > > One CPHY lane is 3 three wires. So data-lanes = <1> means three wire > that only the PHY driver understands. > > We communicate in lanes not in pads. There is no meaningful way to > specify pads in DT - only lanes. > > Which means lanes - I think we should follow what struct phy_mipi_dphy > already models for us: > > /** >  * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set >  * >  * This structure is used to represent the configuration state of a >  * MIPI D-PHY phy. >  */ > struct phy_configure_opts_mipi_dphy { > >         /** >          * @lanes: >          * >          * Number of active, consecutive, data lanes, starting from >          * lane 0, used for the transmissions. >          */ >         unsigned char           lanes; > }; > > For example in DPHY lane == "two pads on the SoC" so for us in CPHY mode > lane == "three pads on the SoC", there's no need to deviate from that. > Ack. We will keep it as lanes. > The CSID needs to know the symbol rate - so that it can vote on the > appropriate NOC/CamNOC clocks/rails but... does the PHY driver itself > need to know that ? It does not, symbol_rate is not required in this > struct no more than it is in DPHY. > Yes agree. I was thinking the same. We would not need the symbol_rate in the struct. > Sample principle. > > So _really_ thinking about this I suggest > > - Following the DPHY example > - Including all of the CPHY specific timings >   The ones you posted, plus the few I found missing >   Any other relevant CPHY timings we may have missed > - Include the helper functions in drivers/phy/phy-core-mipi-cphy.c >   IMO we should use defines not hard-coded constants for the >   specification of the timings here, unlike the DPHY code > These comments will be addressed in the next version. > --- > bod