* Re: [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware
@ 2014-12-08 22:07 Kenneth Westfield
0 siblings, 0 replies; 4+ messages in thread
From: Kenneth Westfield @ 2014-12-08 22:07 UTC (permalink / raw)
To: Courtney Cavin
Cc: Kenneth Westfield, ALSA Mailing List, Device Tree Mailing List,
MSM Mailing List, Mark Brown, Liam Girdwood, Takashi Iwai,
Rob Herring, Greg KH, David Brown, Bryan Huntsman,
Banajit Goswami, Patrick Lai
On Wed, November 19, 2014 2:54 pm, Courtney Cavin wrote:
> On Wed, Nov 19, 2014 at 07:52:49PM +0100, Kenneth Westfield wrote:
>> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
>> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>> @@ -2,6 +2,7 @@
>> #include "skeleton.dtsi"
>> #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
>> +#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
> Neither this file nor an associated clock controller driver exists in mainline. Is there some
other series this depends on?
> -Courtney
This patch series has a dependency on the following patch series from linux-arm-msm: [PATCH v2
0/8] qcom audio clock control drivers
http://thread.gmane.org/gmane.linux.ports.arm.msm/10793
--
Kenneth Westfield
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation
Collaborative Project
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 0/9] ASoC: QCOM: Add support for ipq806x SOC
@ 2014-11-19 18:52 Kenneth Westfield
2014-11-19 18:52 ` [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
0 siblings, 1 reply; 4+ messages in thread
From: Kenneth Westfield @ 2014-11-19 18:52 UTC (permalink / raw)
To: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List
Cc: Kenneth Westfield, Mark Brown, Liam Girdwood, Takashi Iwai,
Rob Herring, Greg KH, David Brown, Bryan Huntsman,
Banajit Goswami, Patrick Lai
From: Kenneth Westfield <kwestfie@codeaurora.org>
This set of patches adds support for audio on the Qualcomm Technologies
ipq806x SOC.
The ipq806x SOC has audio-related hardware blocks in its low-power audio
subsystem (or LPASS). One of the relevant blocks in the LPASS is its
low-power audio interface (or LPAIF). This encapsulates the MI2S port,
which is what these drivers are configured to use. The I2S pins are
connected to an external DAC/amp chip. In addition, a single GPIO is
connected to the same DAC/amp, which gives the SOC enable/disable
control.
The specific drivers added are:
- a machine driver that handles the board-specific pins
- a native driver that handles hardware access to the LPAIF
- a CPU DAI driver for controlling the LPAIF block
- a PCM MI2S platform driver
Corresponding additions to the device tree for the ipq806x and its
documentation has also been added. Also, as this is a new directory,
the MAINTAINERS file has been updated as well.
- Ken
Kenneth Westfield (9):
MAINTAINERS: Add QCOM audio ASoC maintainer
ASoC: qcom: Add device tree binding docs
ASoC: ipq806x: add native LPAIF driver
ASoC: ipq806x: Add LPASS CPU DAI driver
ASoC: ipq806x: Add I2S PCM platform driver
ASoC: ipq806x: Add machine driver for IPQ806X SOC
ASoC: qcom: Add ability to build QCOM drivers
ASoC: Allow for building QCOM drivers
ARM: dts: Model IPQ LPASS audio hardware
.../bindings/sound/qcom,ipq806x-snd-card.txt | 41 ++
.../bindings/sound/qcom,lpass-cpu-dai.txt | 20 +
.../devicetree/bindings/sound/qcom,lpass-lpaif.txt | 21 +
.../bindings/sound/qcom,lpass-pcm-mi2s.txt | 12 +
MAINTAINERS | 7 +
arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 ++
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/qcom/Kconfig | 43 ++
sound/soc/qcom/Makefile | 11 +
sound/soc/qcom/ipq806x.c | 221 ++++++++++
sound/soc/qcom/lpass-cpu-dai.c | 307 +++++++++++++
sound/soc/qcom/lpass-lpaif.c | 488 +++++++++++++++++++++
sound/soc/qcom/lpass-lpaif.h | 181 ++++++++
sound/soc/qcom/lpass-pcm-mi2s.c | 390 ++++++++++++++++
sound/soc/qcom/lpass-pcm-mi2s.h | 40 ++
16 files changed, 1817 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,ipq806x-snd-card.txt
create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu-dai.txt
create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-lpaif.txt
create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-pcm-mi2s.txt
create mode 100644 sound/soc/qcom/Kconfig
create mode 100644 sound/soc/qcom/Makefile
create mode 100644 sound/soc/qcom/ipq806x.c
create mode 100644 sound/soc/qcom/lpass-cpu-dai.c
create mode 100644 sound/soc/qcom/lpass-lpaif.c
create mode 100644 sound/soc/qcom/lpass-lpaif.h
create mode 100644 sound/soc/qcom/lpass-pcm-mi2s.c
create mode 100644 sound/soc/qcom/lpass-pcm-mi2s.h
--
1.8.2.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware
2014-11-19 18:52 [PATCH 0/9] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
@ 2014-11-19 18:52 ` Kenneth Westfield
2014-11-19 22:54 ` Courtney Cavin
2014-11-25 22:08 ` Mark Brown
0 siblings, 2 replies; 4+ messages in thread
From: Kenneth Westfield @ 2014-11-19 18:52 UTC (permalink / raw)
To: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List
Cc: Kenneth Westfield, Mark Brown, Liam Girdwood, Takashi Iwai,
Rob Herring, Greg KH, David Brown, Bryan Huntsman,
Banajit Goswami, Patrick Lai
From: Kenneth Westfield <kwestfie@codeaurora.org>
Model the LPASS audio hardware for the IPQ806X.
Change-Id: Ide1aa0d09c23d4496aa9c40e3c9878a968261f11
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,6 +2,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
#include <dt-bindings/soc/qcom,gsbi.h>
/ {
@@ -66,6 +67,38 @@
ranges;
compatible = "simple-bus";
+ sound {
+ compatible = "qcom,ipq806x-snd-card";
+ status = "disabled";
+ clocks = <&lcc AHBIX_CLK>;
+ clock-names = "ahbix_clk";
+ asoc-platform = <&pcm0>;
+ asoc-platform-names = "lpass-pcm-mi2s";
+ asoc-cpu = <&dai_mi2s>;
+ asoc-cpu-names = "lpass-cpu-dai";
+ };
+
+ lpass-lpaif {
+ compatible = "qcom,lpass-lpaif";
+ status = "disabled";
+ reg = <0x28100000 0x10000>;
+ reg-names = "lpass-lpaif-mem";
+ interrupts = <0 85 1>;
+ interrupt-names = "lpass-lpaif-irq";
+ };
+
+ dai_mi2s: lpass-cpu-dai {
+ compatible = "qcom,lpass-cpu-dai";
+ status = "disabled";
+ clocks = <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>;
+ clock-names = "mi2s_osr_clk", "mi2s_bit_clk";
+ };
+
+ pcm0: lpass-pcm-mi2s {
+ compatible = "qcom,lpass-pcm-mi2s";
+ status = "disabled";
+ };
+
qcom_pinmux: pinmux@800000 {
compatible = "qcom,ipq8064-pinctrl";
reg = <0x800000 0x4000>;
--
1.8.2.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware
2014-11-19 18:52 ` [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
@ 2014-11-19 22:54 ` Courtney Cavin
2014-11-25 22:08 ` Mark Brown
1 sibling, 0 replies; 4+ messages in thread
From: Courtney Cavin @ 2014-11-19 22:54 UTC (permalink / raw)
To: Kenneth Westfield
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Mark Brown, Liam Girdwood, Takashi Iwai, Rob Herring, Greg KH,
David Brown, Bryan Huntsman, Banajit Goswami, Patrick Lai
On Wed, Nov 19, 2014 at 07:52:49PM +0100, Kenneth Westfield wrote:
> From: Kenneth Westfield <kwestfie@codeaurora.org>
>
> Model the LPASS audio hardware for the IPQ806X.
>
> Change-Id: Ide1aa0d09c23d4496aa9c40e3c9878a968261f11
As Kumar mentioned, please exclude this.
> Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
> Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
Typically, the order of these SoB should match some sort of chain of delivery:
- The first should be the author of the patch
- The last should match the email source (you) <-- doesn't seem to be the case
> ---
> arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -2,6 +2,7 @@
>
> #include "skeleton.dtsi"
> #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
> +#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
Neither this file nor an associated clock controller driver exists in
mainline. Is there some other series this depends on?
-Courtney
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware
2014-11-19 18:52 ` [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
2014-11-19 22:54 ` Courtney Cavin
@ 2014-11-25 22:08 ` Mark Brown
1 sibling, 0 replies; 4+ messages in thread
From: Mark Brown @ 2014-11-25 22:08 UTC (permalink / raw)
To: Kenneth Westfield
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Liam Girdwood, Takashi Iwai, Rob Herring, Greg KH, David Brown,
Bryan Huntsman, Banajit Goswami, Patrick Lai
[-- Attachment #1: Type: text/plain, Size: 1157 bytes --]
On Wed, Nov 19, 2014 at 10:52:49AM -0800, Kenneth Westfield wrote:
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> + sound {
> + compatible = "qcom,ipq806x-snd-card";
> + status = "disabled";
> + clocks = <&lcc AHBIX_CLK>;
> + clock-names = "ahbix_clk";
> + asoc-platform = <&pcm0>;
> + asoc-platform-names = "lpass-pcm-mi2s";
> + asoc-cpu = <&dai_mi2s>;
> + asoc-cpu-names = "lpass-cpu-dai";
> + };
This appears to be part of the board but...
> + lpass-lpaif {
> + compatible = "qcom,lpass-lpaif";
> + status = "disabled";
> + reg = <0x28100000 0x10000>;
> + reg-names = "lpass-lpaif-mem";
> + interrupts = <0 85 1>;
> + interrupt-names = "lpass-lpaif-irq";
> + };
> +
> + dai_mi2s: lpass-cpu-dai {
> + compatible = "qcom,lpass-cpu-dai";
> + status = "disabled";
> + clocks = <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>;
> + clock-names = "mi2s_osr_clk", "mi2s_bit_clk";
> + };
> +
> + pcm0: lpass-pcm-mi2s {
> + compatible = "qcom,lpass-pcm-mi2s";
> + status = "disabled";
> + };
> +
...these are all part of the SoC. I'd expect these to go into separate
files.
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