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From: Felipe Balbi <balbi@kernel.org>
To: Thinh Nguyen <thinh.nguyen@synopsys.com>Thinh Nguyen
	<thinh.nguyen@synopsys.com>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: John Youn <john.youn@synopsys.com>
Subject: Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Date: Thu, 08 Nov 2018 09:17:03 +0200	[thread overview]
Message-ID: <874lcst4wg.fsf@linux.intel.com> (raw)
In-Reply-To: <30102591E157244384E984126FC3CB4F639A0ACE@us01wembx1.internal.synopsys.com>

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Hi,

Thinh Nguyen <thinh.nguyen@synopsys.com> writes:
>>>>> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
>>>>> index 636630fb92d7..712b344c3a31 100644
>>>>> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>>>>> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>>>>> @@ -95,6 +95,24 @@ Optional properties:
>>>>>  			this and tx-thr-num-pkt-prd to a valid, non-zero value
>>>>>  			1-16 (DWC_usb31 programming guide section 1.2.3) to
>>>>>  			enable periodic ESS TX threshold.
>>>>> + - snps,refclk-period-ns: set to program the reference clock period. The valid
>>>>> +   			input periods are as follow:
>>>>> +			+-------------+-----------------+
>>>>> +			| Period (ns) | Freq (MHz)      |
>>>>> +			+-------------+-----------------+
>>>>> +			| 25          | 39.7/40         |
>>>>> +			| 41          | 24.4            |
>>>>> +			| 50          | 20              |
>>>>> +			| 52          | 19.2            |
>>>>> +			| 58          | 17.2            |
>>>>> +			| 62          | 16.1            |
>>>>> +			+-------------+-----------------+
>>>>> + - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous
>>>>> +			transfers by running SOF/ITP counters using the
>>>>> +			reference clock. Only valid for DWC_usb31 peripheral
>>>>> +			controller v1.80a and higher. Both
>>>>> +			"snps,dis_u2_susphy_quirk" and
>>>>> +			"snps,dis_enblslpm_quirk" must not be set.
>>>> sounds like you should rely on clk API here. Then on driver call
>>>> clk_get_rate() to computer whatever you need to compute.
>>>>
>>> There's nothing to compute here. We can simply enable this feature with
>>> "snps, enable-refclk-lpm" and the controller will use the default refclk
>>> settings.
>> Right, right. What I'm saying, though, is that we have a clock API for
>> describing a clock. So why wouldn't we rely on that API for this? I
>> think both of these new properties can be replaced with standard clock
>> API properties:
>>
>> 	clocks = <&clk1>, ..., <&lpm_clk>
>>         clock-names = "clock1", ...., "lpm";
>>
>> Then dwc3 core could, simply, check if we have a clock named "lpm" and
>> if there is, use NSECS_PER_SEC / clk_get_rate() to get its period and
>> write it to the register that needs the information.
> There's no new clock here. We are using the ref_clk for SOF and ITP
> counter for this feature. Also, clocks are optional on non-DT platforms.
> To use the clock API, then we need to update the driver to allow some
> optional clock such as "ref" clock for non-DT platforms. Do you want to
> do it like this?

I can't think of a problem that would arise from that. Can you? Mark,
Rob, what do you think?

-- 
balbi

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  reply	other threads:[~2018-11-08  7:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-03  1:35 [PATCH 0/3] usb: dwc3: Introduce refclk lpm Thinh Nguyen
2018-11-03  1:35 ` [PATCH 1/3] usb: dwc3: Add reference clock properties Thinh Nguyen
2018-11-06 11:26   ` Felipe Balbi
2018-11-07  4:11     ` Thinh Nguyen
2018-11-07  6:37       ` Felipe Balbi
2018-11-07 22:49         ` Thinh Nguyen
2018-11-08  7:17           ` Felipe Balbi [this message]
2018-11-08 19:51             ` Thinh Nguyen
2018-11-09  7:14               ` Felipe Balbi
2018-11-09  7:45                 ` Thinh Nguyen
2018-11-09  8:54                   ` Felipe Balbi
2018-12-08  2:25                     ` Thinh Nguyen

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