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Wed, 16 Sep 2026 18:12:31 -0700 (PDT) Sender: Guenter Roeck Date: Wed, 16 Sep 2026 18:12:31 -0700 From: Guenter Roeck To: Prabhakar Cc: Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , Brian Masney , Wim Van Sebroeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: Re: [PATCH v4 5/7] watchdog: rzv2h: Add syscon support for WDTDCR Message-ID: <87577cdb-7f1d-4a9f-8a61-ff1f272234d9@roeck-us.net> References: <20260817192540.423994-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20260817192540.423994-6-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260817192540.423994-6-prabhakar.mahadev-lad.rj@bp.renesas.com> Hi, On Mon, Aug 17, 2026 at 08:25:38PM +0100, Prabhakar wrote: > From: Lad Prabhakar > > On RZ/T2H and RZ/N2H SoCs, the WDTDCR (WDT Debug Control Register) resides > in the second register region of the CPG/MSSR block. Since this > multi-function block is shared with other peripherals, it is exposed via a > syscon regmap interface. > > Look up the SYSC regmap using the optional "renesas,sysc" property and > derive the WDTDCR offset from the watchdog instance index. > > Retain the existing MMIO-based access method when the "renesas,sysc" > property is absent to preserve compatibility with existing DT's. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Geert Uytterhoeven Can I apply this patch without the other patches of the series ? Thanks, Guenter > --- > v3->v4: > - No change > > v2->v3: > - Made use of the new "renesas,sysc" phandle-array property to access the > WDTDCR register via the CPG/MSSR syscon node. > - Updated commit message > > v1->v2: > - No change. > --- > drivers/watchdog/Kconfig | 1 + > drivers/watchdog/rzv2h_wdt.c | 56 +++++++++++++++++++++++++++++------- > 2 files changed, 46 insertions(+), 11 deletions(-) > > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig > index f7d0a0c2c0ef..3c4fc9916d8c 100644 > --- a/drivers/watchdog/Kconfig > +++ b/drivers/watchdog/Kconfig > @@ -1046,6 +1046,7 @@ config RENESAS_RZV2HWDT > depends on ARCH_RENESAS || COMPILE_TEST > depends on PM || COMPILE_TEST > select WATCHDOG_CORE > + select MFD_SYSCON > help > This driver adds watchdog support for the integrated watchdogs in the > Renesas RZ/{G3E,V2H(P)} SoCs. These watchdogs can be used to reset a > diff --git a/drivers/watchdog/rzv2h_wdt.c b/drivers/watchdog/rzv2h_wdt.c > index 8af2f33b5680..04ea962da837 100644 > --- a/drivers/watchdog/rzv2h_wdt.c > +++ b/drivers/watchdog/rzv2h_wdt.c > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -44,6 +45,11 @@ > > #define WDT_DEFAULT_TIMEOUT 60U > > +#define RZT2H_WDT_MAX_INSTANCES 6 > + > +#define RZT2H_SYS_BLOCK1(n) (BIT(16) | (0x5100 + (n) * 4)) > +#define RZT2H_WDTDCR_OFFSET(n) RZT2H_SYS_BLOCK1(n) > + > static bool nowayout = WATCHDOG_NOWAYOUT; > module_param(nowayout, bool, 0); > MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" > @@ -64,14 +70,19 @@ struct rzv2h_of_data { > bool wdtdcr; > }; > > +struct rzv2h_sysc_wdtdcr { > + struct regmap *regmap; > + unsigned int offset; > +}; > + > struct rzv2h_wdt_priv { > void __iomem *base; > - struct regmap *wdtdcr_regmap; > struct clk *pclk; > struct clk *oscclk; > struct reset_control *rstc; > struct watchdog_device wdev; > const struct rzv2h_of_data *of_data; > + struct rzv2h_sysc_wdtdcr sysc; > }; > > static int rzv2h_wdt_ping(struct watchdog_device *wdev) > @@ -90,12 +101,16 @@ static int rzv2h_wdt_ping(struct watchdog_device *wdev) > > static int rzt2h_wdt_wdtdcr_count_stop(struct rzv2h_wdt_priv *priv) > { > - return regmap_set_bits(priv->wdtdcr_regmap, WDTDCR, WDTDCR_WDTSTOPCTRL); > + struct rzv2h_sysc_wdtdcr *sysc = &priv->sysc; > + > + return regmap_set_bits(sysc->regmap, sysc->offset, WDTDCR_WDTSTOPCTRL); > } > > static int rzt2h_wdt_wdtdcr_count_start(struct rzv2h_wdt_priv *priv) > { > - return regmap_clear_bits(priv->wdtdcr_regmap, WDTDCR, WDTDCR_WDTSTOPCTRL); > + struct rzv2h_sysc_wdtdcr *sysc = &priv->sysc; > + > + return regmap_clear_bits(sysc->regmap, sysc->offset, WDTDCR_WDTSTOPCTRL); > } > > static void rzv2h_wdt_setup(struct watchdog_device *wdev, u16 wdtcr) > @@ -284,17 +299,36 @@ static const struct regmap_config rzv2h_wdtdcr_regmap_config = { > static int rzt2h_wdt_wdtdcr_init(struct platform_device *pdev, > struct rzv2h_wdt_priv *priv) > { > - void __iomem *wdtdcr; > + struct device_node *np = pdev->dev.of_node; > + bool syscon_present = of_property_present(np, "renesas,sysc"); > + struct rzv2h_sysc_wdtdcr *sysc = &priv->sysc; > int ret; > > - wdtdcr = devm_platform_ioremap_resource(pdev, 1); > - if (IS_ERR(wdtdcr)) > - return PTR_ERR(wdtdcr); > + if (syscon_present) { > + unsigned int wdt_index; > > - priv->wdtdcr_regmap = devm_regmap_init_mmio(&pdev->dev, wdtdcr, > - &rzv2h_wdtdcr_regmap_config); > - if (IS_ERR(priv->wdtdcr_regmap)) > - return PTR_ERR(priv->wdtdcr_regmap); > + sysc->regmap = syscon_regmap_lookup_by_phandle_args(np, "renesas,sysc", > + 1, &wdt_index); > + if (IS_ERR(sysc->regmap)) > + return PTR_ERR(sysc->regmap); > + > + if (wdt_index >= RZT2H_WDT_MAX_INSTANCES) > + return -EINVAL; > + > + sysc->offset = RZT2H_WDTDCR_OFFSET(wdt_index); > + } else { > + void __iomem *wdtdcr; > + > + wdtdcr = devm_platform_ioremap_resource(pdev, 1); > + if (IS_ERR(wdtdcr)) > + return PTR_ERR(wdtdcr); > + > + sysc->regmap = devm_regmap_init_mmio(&pdev->dev, wdtdcr, > + &rzv2h_wdtdcr_regmap_config); > + if (IS_ERR(sysc->regmap)) > + return PTR_ERR(sysc->regmap); > + sysc->offset = WDTDCR; > + } > > ret = pm_runtime_resume_and_get(&pdev->dev); > if (ret)