From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4894EC433F5 for ; Mon, 7 Mar 2022 15:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241358AbiCGP4n (ORCPT ); Mon, 7 Mar 2022 10:56:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231715AbiCGP4m (ORCPT ); Mon, 7 Mar 2022 10:56:42 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 501FB7D007; Mon, 7 Mar 2022 07:55:48 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DBC7160A20; Mon, 7 Mar 2022 15:55:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 49769C340EB; Mon, 7 Mar 2022 15:55:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646668547; bh=aVLhNCf5hrMjPL7JDmyueIwlbRUgBoYxzLRoIl+RLYk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=myX9e1ypm7GnGg1V9fumjZnegDmHdNoYeSrwbwq2WP0AgwwosEveFiTr9MLoHcTHS 5ZHY2aoDnZbgSGSOfIkhAJbqIrxPKINOUjUJZoBoc8pySSabKHnS2obNCOM2bqa5DS xcF8O7Jfm9nxky0c2HAoAvdaRuWegfT7hYWAh6QXNRdaBoy/ACEPmV9Mx9s0BXNG0N oOE497w3Of5Vr6iT5qcw3NAImtBXLAMH3Fcrl1Bv03jmuIxTPkMC7RTdz6Xlm9tJpa N/A75QMnNobqHfJfLDpQ8g0fvo1pxudipd+ltgvMxnEk84Ejw07guKW8QrgGFA75aO 4N/q3zK8ZZTrg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nRFi4-00Cpho-QR; Mon, 07 Mar 2022 15:55:44 +0000 Date: Mon, 07 Mar 2022 15:55:44 +0000 Message-ID: <875yop21vj.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mark Rutland , Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Thomas Gleixner , Dougall , kernel-team@android.com Subject: Re: [PATCH v5 00/10] drivers/perf: CPU PMU driver for Apple M1 In-Reply-To: <20220208185604.1097957-1-maz@kernel.org> References: <20220208185604.1097957-1-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, marcan@marcan.st, sven@svenpeter.dev, alyssa@rosenzweig.io, robh+dt@kernel.org, tglx@linutronix.de, dougallj@gmail.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 08 Feb 2022 18:55:54 +0000, Marc Zyngier wrote: > > The M1 SoC embeds a per-CPU PMU that has a very different programming > interface compared to the architected PMUv3 that is normally present > on standard implementations. > > This small series adds a driver for this HW by leveraging the arm_pmu > infrastructure, resulting in a rather simple driver. > > Of course, we know next to nothing about the actual events this PMU > counts, aside from CPU cycles and instructions. Everything else is > undocumented (though as Dougall pointed out, someone could extract the > relevant information from a macOS install if they wanted -- I don't). > I'm looking at allowing the perf userspace tool to load the event > descriptions at runtime, which would probably help. [...] FWIW, I have created two branches: - [1] has the full series - [2] has the irqchip/DT prefix of [1] Both branches are stable, and I expect [2] to be used as a shared branch between the irqchip and perf trees. Thanks, M. [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=hack/m1-pmu [2] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/aic-pmu -- Without deviation from the norm, progress is not possible.