From: Felipe Balbi <balbi@kernel.org>
To: Thinh Nguyen <thinh.nguyen@synopsys.com>,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: John Youn <john.youn@synopsys.com>
Subject: Re: [PATCH 1/3] usb: dwc3: Add reference clock properties
Date: Tue, 06 Nov 2018 13:26:14 +0200 [thread overview]
Message-ID: <877ehqv44p.fsf@linux.intel.com> (raw)
In-Reply-To: <ca0957e58d1d7c1ed49b53345a5c4ed9209c0968.1541208283.git.thinhn@synopsys.com>
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hi,
Thinh Nguyen <thinh.nguyen@synopsys.com> writes:
> Add two new device properties to program the reference clock period and
> to enable low power management using the reference clock. This allows a
> higher demand to go in low power for Audio Device Class devices. This
> feature is currently only valid for DWC_usb31 peripheral controller
> v1.80a and higher.
>
> Set "snps,refclk-period-ns" to program the reference clock period. The
> valid input periods are as follow:
> +-------------+-----------------+
> | Period (ns) | Freq (MHz) |
> +-------------+-----------------+
> | 25 | 39.7/40 |
> | 41 | 24.4 |
> | 50 | 20 |
> | 52 | 19.2 |
> | 58 | 17.2 |
> | 62 | 16.1 |
> +-------------+-----------------+
>
> Set "snps,refclk-lpm" to enable low power scheduling of isochronous
> transfers by running SOF/ITP counters using the reference clock. Both
> "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be
> set for this feature to be enabled.
>
> Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
> ---
> Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index 636630fb92d7..712b344c3a31 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -95,6 +95,24 @@ Optional properties:
> this and tx-thr-num-pkt-prd to a valid, non-zero value
> 1-16 (DWC_usb31 programming guide section 1.2.3) to
> enable periodic ESS TX threshold.
> + - snps,refclk-period-ns: set to program the reference clock period. The valid
> + input periods are as follow:
> + +-------------+-----------------+
> + | Period (ns) | Freq (MHz) |
> + +-------------+-----------------+
> + | 25 | 39.7/40 |
> + | 41 | 24.4 |
> + | 50 | 20 |
> + | 52 | 19.2 |
> + | 58 | 17.2 |
> + | 62 | 16.1 |
> + +-------------+-----------------+
> + - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous
> + transfers by running SOF/ITP counters using the
> + reference clock. Only valid for DWC_usb31 peripheral
> + controller v1.80a and higher. Both
> + "snps,dis_u2_susphy_quirk" and
> + "snps,dis_enblslpm_quirk" must not be set.
sounds like you should rely on clk API here. Then on driver call
clk_get_rate() to computer whatever you need to compute.
--
balbi
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next prev parent reply other threads:[~2018-11-06 11:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-03 1:35 [PATCH 0/3] usb: dwc3: Introduce refclk lpm Thinh Nguyen
2018-11-03 1:35 ` [PATCH 1/3] usb: dwc3: Add reference clock properties Thinh Nguyen
2018-11-06 11:26 ` Felipe Balbi [this message]
2018-11-07 4:11 ` Thinh Nguyen
2018-11-07 6:37 ` Felipe Balbi
2018-11-07 22:49 ` Thinh Nguyen
2018-11-08 7:17 ` Felipe Balbi
2018-11-08 19:51 ` Thinh Nguyen
2018-11-09 7:14 ` Felipe Balbi
2018-11-09 7:45 ` Thinh Nguyen
2018-11-09 8:54 ` Felipe Balbi
2018-12-08 2:25 ` Thinh Nguyen
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