Re: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY

[Mattijs Korpershoek <mkorpershoek@kernel.org>]

On Thu, Jul 30, 2026 at 14:06, sashiko-bot@kernel.org wrote:

> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Missing hardware-specific PHY tuning parameters for the Synopsys Femto High-Speed USB PHY V2.
> --
>
> --- Patch [1]: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY ---
> commit 04bc91a6fe06261e099ae8fda1bb90e34d0f28fc
> Author: Mattijs Korpershoek <mkorpershoek@kernel.org>
>
> dt-bindings: phy: Add sa8255p high-speed USB PHY
>
> This commit introduces a new device tree binding for the Qualcomm SA8255p 
> Synopsys Femto High-Speed USB PHY V2. It specifies that the hardware uses 
> SCMI power domains to manage resources like clocks, interconnects, and 
> resets, rather than defining them individually.
>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml
>> new file mode 100644
>> index 0000000000000..09f7ca6e7f727
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml
>
> [ ... ]
>
>> +required:
>> +  - compatible
>> +  - reg
>> +  - "#phy-cells"
>> +  - power-domains
>> +  - power-domain-names
>> +
>> +additionalProperties: false
>
> [Severity: Medium]
> Since this IP block is still the Synopsys Femto High-Speed USB PHY V2, 
> would board configurations for this platform still need to apply standard 
> hardware tuning parameters (such as qcom,squelch-detector-bp)?
>
> While clocks and resets are abstracted into SCMI power domains here, the 
> memory-mapped reg space is still provided and typically used to program 
> these signal characteristics. With additionalProperties set to false, 
> schema validation will fail for any board device tree that attempts to 
> override these valid PHY tuning properties.
>
> Might it be necessary to include these tuning properties, perhaps by 
> referencing a common schema, so that boards can safely tune squelch 
> detection and pre-emphasis without triggering validation errors?

No, from the testing I've done it's not needed to add any PHY tuning properties.

>
>> +
>> +examples:
>> +  - |
>> +    soc {
>
> [ ... ]
>
> -- 
> Sashiko AI review · https://sashiko.dev/#/patchset/20260730-phy-qcom-snps-femto-v2-8255-v1-0-8b8bf5105a68@kernel.org?part=1