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bh=yi+JDYL57ewf0irzru1gG1+7r9jGjICYz/MQy5TCGUw=; b=ERCndOZ4biQ61d8+Im5snI3+NFhcVZi3MhW7JlyrSpw79Xj7c+dBbjbQMiRFTqFk4jZsfu kJebeynHP+3KxmKNGm1beHxPHnp2vSI17dBkvqJITXKQHnevTT0tSXH500x7GLT6i9yg8a hDQNqN4bfkbBEpDxuMfT3EwAq421T/6sCy82RtuYxeqd0XQhJ1M4SEbOjYY7s0flhb6VUy AnTcAxYSrkO8qd+0E83ja9ACbWh1Mr6ydf7hUJiyckaQP32ijneUClC00mxKAIWwbNuMP/ L7phdwpGOQiEADMw3W1k0K09ITIRNCCvnCGGdU4XU5ykHipdH2i1rWSOgc5kvg== From: Miquel Raynal To: "Kumar, Udit" Cc: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Thomas Petazzoni , Steam Lin Subject: Re: [PATCH] arm64: dts: ti: k3-am62a7-sk: Describe the SPI NAND In-Reply-To: <98b6208c-4cfd-4746-9e49-4f5596f8cf3e@ti.com> (Udit Kumar's message of "Sat, 19 Apr 2025 18:35:47 +0530") References: <20250401135822.244402-1-miquel.raynal@bootlin.com> <98b6208c-4cfd-4746-9e49-4f5596f8cf3e@ti.com> User-Agent: mu4e 1.12.7; emacs 29.4 Date: Tue, 27 May 2025 12:09:48 +0200 Message-ID: <87a56ytleb.fsf@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgddvtddutdculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvvefujghffgffkfggtgfgsehtqhertddtreejnecuhfhrohhmpefoihhquhgvlhcutfgrhihnrghluceomhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepffeghfejtdefieeguddukedujeektdeihfelleeuieeuveehkedvleduheeivdefnecukfhppeeltddrkeelrdduieefrdduvdejnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehinhgvthepledtrdekledrudeifedruddvjedphhgvlhhopehlohgtrghlhhhoshhtpdhmrghilhhfrhhomhepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepuddupdhrtghpthhtohepuhdqkhhumhgrrhdusehtihdrtghomhdprhgtphhtthhopehnmhesthhirdgtohhmpdhrtghpthhtohepvhhighhnvghshhhrsehtihdrtghomhdprhgtphhtthhopehkrhhishhtoheskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheprhhosghhodgutheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepkhhriihkodgutheskhgvrhhnvghlrdhor hhgpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtphhtthhopeguvghvihgtvghtrhgvvgesvhhgvghrrdhkvghrnhgvlhdrohhrgh X-GND-Sasl: miquel.raynal@bootlin.com Hello Kumar, >> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts >> @@ -737,3 +737,43 @@ dpi1_out: endpoint { >> }; >> }; >> }; >> + >> +&fss { >> + status =3D "okay"; >> +}; >> + >> +&ospi0 { >> + pinctrl-names =3D "default"; >> + pinctrl-0 =3D <&ospi0_pins_default>; >> + >> + flash@0 { >> + compatible =3D "spi-nand"; > > Since this is boot flash, so please add booth-all property as well Ok. > > >> + reg =3D <0>; >> + spi-tx-bus-width =3D <8>; >> + spi-rx-bus-width =3D <8>; >> + spi-max-frequency =3D <25000000>; >> + cdns,tshsl-ns =3D <60>; >> + cdns,tsd2d-ns =3D <60>; >> + cdns,tchsh-ns =3D <60>; >> + cdns,tslch-ns =3D <60>; >> + cdns,read-delay =3D <2>; > > Since this flash is used as boot device, I suggest if you can add > partitions of flash as well . > > you can take reference from downstream version [0] The flash is currently not the primary boot device, and the flash is very fragmented in smaller mtd partitions, which is not ideal for wear levelling. I prefer to let TI people propose a partitioning scheme themselves. Thanks, Miqu=C3=A8l