From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19B0377F10; Fri, 27 Dec 2024 16:47:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735318062; cv=none; b=WqkJmVFroK+fcirG57aVHk/qlqa6MTSOM6xa664o16jeHqXv0lx1EKLYbPv62vZeKlYxHo4GXJTiKTD1vBqqoFYDL39cV532zhI26tQ4eWAWitWzhwc+i0N8/sIoreFZGP68ziSPoUMoOzWU9lNlLYrwPzL0QCos4N0KR2zombc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735318062; c=relaxed/simple; bh=RbTLJ3TCnphcYvnAzlzQ9woXDDQOo0U23BlvBss9hvI=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=p1MQkeVQhjH4E3cn4sSKh58R1Xxs2Arz1cAW2VyFmsNlA8Y1Eq9FWV/C7wQ/lP3yh9sZzmlbWSOftxISauBoeb3+4uW3qufjA2vKio8ZCc0WtMD6Zc4ZFClhNwZnPvWF0E701g2AP5uIMtS2hKNmRB6g19hJsWQ8gdemD7FV1mU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EF8lxMU+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EF8lxMU+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 84C5BC4CED3; Fri, 27 Dec 2024 16:47:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1735318061; bh=RbTLJ3TCnphcYvnAzlzQ9woXDDQOo0U23BlvBss9hvI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=EF8lxMU++oHFKL/9oY/5q1H3k0CcrTSZ4IWiDS3IxVA7eu/siHUcHk6ZduFsJfzPw ZX1roINHgeXBQONqI5rsiazqv4JBk3D/4NLGvUb7kScIwGCk5lVakNC5LjcfOoXCgs Zz5uoh3gFcJYjB9YjjkIyzrHLggufQUvVUCJt/4NVxNcCWjrHK+uA2UaWnkzCoAxq0 KCnTLxmgWtw9pL+sCcWoexSPgx6UMq6YFWoWildsfwnv+PKU+Vio/pyC+k4plM6YSF 2cz7GUUmS/sASXAVkq3HyX+K0aYXeRRq71dm93g9+sB3PvrOnNZ7fWG65jNc0nwbEL qrPZqYKGIwO1g== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tRDUx-007Fyr-Ce; Fri, 27 Dec 2024 16:47:39 +0000 Date: Fri, 27 Dec 2024 16:47:39 +0000 Message-ID: <87a5choyxg.wl-maz@kernel.org> From: Marc Zyngier To: Dragan Simic Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, FUKAUMI Naoki Subject: Re: [PATCH 1/2] arm64: dts: rockchip: Use "dma-noncoherent" in base RK3588 SoC dtsi In-Reply-To: References: User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: dsimic@manjaro.org, linux-rockchip@lists.infradead.org, heiko@sntech.de, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, naoki@radxa.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 27 Dec 2024 15:42:23 +0000, Dragan Simic wrote: > > The preferred way to denote hardware with non-coherent DMA is to use the > "dma-noncoherent" DT property, at both the GIC redistributor and the GIC ITS > levels, [1] instead of relying on the compatibles to handle hardware errata, > in this case the Rockchip 3588001 errata. [2] > > Let's have the preferred way employed in the base Rockchip RK3588 SoC dtsi, > which also goes along with adding initial support for the Rockchip RK3582 SoC > variant, with its separate compatible. [2][3] > > [1] Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml > [2] https://lore.kernel.org/linux-rockchip/86msgoozqa.wl-maz@kernel.org/ > [3] https://lore.kernel.org/linux-rockchip/20241222030355.2246-4-naoki@radxa.com/ > > Cc: Marc Zyngier > Cc: FUKAUMI Naoki > Signed-off-by: Dragan Simic Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.