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From: Marc Zyngier <maz@kernel.org>
To: Hector Martin <marcan@marcan.st>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>, Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/6] irqchip/apple-aic: Add Fast IPI support
Date: Mon, 20 Dec 2021 12:43:31 +0000	[thread overview]
Message-ID: <87a6gvwioc.wl-maz@kernel.org> (raw)
In-Reply-To: <83631cf6-46c5-cd87-c3a7-6b619669a943@marcan.st>

On Sat, 18 Dec 2021 05:31:28 +0000,
Hector Martin <marcan@marcan.st> wrote:
> 
> >> +	u64 idx = FIELD_GET(MPIDR_CPU, mpidr);
> >> +
> >> +	if (FIELD_GET(MPIDR_CLUSTER, my_mpidr) == cluster)
> >> +		write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx),
> >> +			       SYS_IMP_APL_IPI_RR_LOCAL_EL1);
> >> +	else
> >> +		write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx) | FIELD_PREP(IPI_RR_CLUSTER, cluster),
> >> +			       SYS_IMP_APL_IPI_RR_GLOBAL_EL1);
> > 
> > Don't you need an ISB, either here or in the two callers? At the
> > moment, I don't see what will force the execution of these writes, and
> > they could be arbitrarily delayed.
> 
> Is there any requirement for timeliness sending IPIs? They're going to
> another CPU after all, they could be arbitrarily delayed because it has
> FIQs masked.

They absolutely could, but this has a potential impact on the
scheduling if you delay it (the vast majority of these IPIs are to
indicate to the remote CPU that it needs to go and schedule something
else). So there is an incentive for making it happen ASAP.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2021-12-20 12:43 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-09  4:32 [PATCH 0/6] irqchip/apple-aic: Add support for AICv2 Hector Martin
2021-12-09  4:32 ` [PATCH 1/6] dt-bindings: interrupt-controller: apple,aic: Add apple,aic2 support Hector Martin
2021-12-09 17:28   ` Rob Herring
2021-12-11 12:28     ` Hector Martin
2021-12-11 12:44       ` Marc Zyngier
2021-12-11 12:52         ` Hector Martin
2021-12-11 12:49       ` Mark Kettenis
2021-12-09  4:32 ` [PATCH 2/6] irqchip/apple-aic: Add Fast IPI support Hector Martin
2021-12-12 12:21   ` Marc Zyngier
2021-12-18  5:31     ` Hector Martin
2021-12-20 12:43       ` Marc Zyngier [this message]
2021-12-09  4:32 ` [PATCH 3/6] irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs Hector Martin
2021-12-12 14:37   ` Marc Zyngier
2021-12-18  5:36     ` Hector Martin
2021-12-09  4:32 ` [PATCH 4/6] irqchip/apple-aic: Dynamically compute register offsets Hector Martin
2021-12-12 18:26   ` Marc Zyngier
2021-12-18  5:37     ` Hector Martin
2021-12-09  4:32 ` [PATCH 5/6] irqchip/apple-aic: Support multiple dies Hector Martin
2021-12-13 16:10   ` Marc Zyngier
2021-12-18  5:39     ` Hector Martin
2021-12-20 13:38       ` Marc Zyngier
2021-12-09  4:32 ` [PATCH 6/6] irqchip/apple-aic: Add support for AICv2 Hector Martin
2021-12-12 18:47   ` Marc Zyngier
2021-12-18  6:02     ` Hector Martin
2021-12-20 13:52       ` Marc Zyngier

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