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d="scan'208";a="88417367" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Aug 2020 02:35:20 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 25 Aug 2020 02:34:38 -0700 Received: from soft-dev15.microsemi.net.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3 via Frontend Transport; Tue, 25 Aug 2020 02:35:14 -0700 References: <20200824151035.31093-1-lars.povlsen@microchip.com> <20200824151035.31093-2-lars.povlsen@microchip.com> <20200825084752.GD2389103@piout.net> From: Lars Povlsen To: Alexandre Belloni List-Id: CC: Ulf Hansson , Lars Povlsen , Adrian Hunter , "SoC Team" , Rob Herring , "Microchip Linux Driver Support" , "linux-mmc@vger.kernel.org" , DTML , Linux ARM , Linux Kernel Mailing List Subject: Re: [PATCH v4 1/3] dt-bindings: mmc: Add Sparx5 SDHCI controller bindings In-Reply-To: <20200825084752.GD2389103@piout.net> Date: Tue, 25 Aug 2020 11:35:14 +0200 Message-ID: <87blizxe3x.fsf@soft-dev15.microsemi.net> MIME-Version: 1.0 Content-Type: text/plain Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Alexandre Belloni writes: > On 25/08/2020 09:33:45+0200, Ulf Hansson wrote: >> On Mon, 24 Aug 2020 at 17:10, Lars Povlsen wrote: >> > >> > The Sparx5 SDHCI controller is based on the Designware controller IP. >> > >> > Signed-off-by: Lars Povlsen >> > --- >> > .../mmc/microchip,dw-sparx5-sdhci.yaml | 65 +++++++++++++++++++ >> > 1 file changed, 65 insertions(+) >> > create mode 100644 Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml >> > >> > diff --git a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml >> > new file mode 100644 >> > index 0000000000000..55883290543b9 >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml >> > @@ -0,0 +1,65 @@ >> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> > +%YAML 1.2 >> > +--- >> > +$id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml# >> > +$schema: http://devicetree.org/meta-schemas/core.yaml# >> > + >> > +title: Microchip Sparx5 Mobile Storage Host Controller Binding >> > + >> > +allOf: >> > + - $ref: "mmc-controller.yaml" >> > + >> > +maintainers: >> > + - Lars Povlsen >> > + >> > +# Everything else is described in the common file >> > +properties: >> > + compatible: >> > + const: microchip,dw-sparx5-sdhci >> > + >> > + reg: >> > + maxItems: 1 >> > + >> > + interrupts: >> > + maxItems: 1 >> > + >> > + clocks: >> > + maxItems: 1 >> > + description: >> > + Handle to "core" clock for the sdhci controller. >> > + >> > + clock-names: >> > + items: >> > + - const: core >> > + >> > + microchip,clock-delay: >> > + description: Delay clock to card to meet setup time requirements. >> > + Each step increase by 1.25ns. >> > + $ref: "/schemas/types.yaml#/definitions/uint32" >> > + minimum: 1 >> > + maximum: 15 >> > + >> > +required: >> > + - compatible >> > + - reg >> > + - interrupts >> > + - clocks >> > + - clock-names >> > + >> > +examples: >> > + - | >> > + #include >> > + #include >> > + sdhci0: mmc@600800000 { >> >> Nitpick: >> >> I think we should use solely "mmc[n]" here. So: >> >> mmc0@600800000 { >> >> Please update patch3/3 accordingly as well. > > This is not what the devicetree specification says. 2.2.2 says that the > generic name is mmc, not mmc[n]. Since there is a proper unit-address, I > don't see the need for an index here. > Alex, Yeah, I thought so as well - and the existing DTs have practically all variations.. Nevertheless, I followed suit since I had to refresh the patch set anyhow. Cheers, ---Lars -- Lars Povlsen, Microchip