From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gregory CLEMENT Subject: Re: [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Date: Wed, 06 Feb 2019 15:17:02 +0100 Message-ID: <87bm3p6ly9.fsf@FE-laptop> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> <20190108162441.5278-14-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20190108162441.5278-14-miquel.raynal@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal List-Id: devicetree@vger.kernel.org Hi Miquel, On mar., janv. 08 2019, Miquel Raynal wrote: > The PCIe node is wired to the second PHY of the COMPHY IP. > > Suggested-by: Grzegorz Jaszczyk > Signed-off-by: Miquel Raynal Applied to mvebu/dt64 Thanks, Gregory > --- > arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts > index 094994a9c68e..c5c72902c647 100644 > --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts > +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts > @@ -46,6 +46,7 @@ > /* J9 */ > &pcie0 { > status = "okay"; > + phys = <&comphy1 0>; > }; > > /* J6 */ > -- > 2.19.1 > -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com