From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 659E9C432BE for ; Mon, 26 Jul 2021 04:31:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4474060F37 for ; Mon, 26 Jul 2021 04:31:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231558AbhGZDv3 (ORCPT ); Sun, 25 Jul 2021 23:51:29 -0400 Received: from guitar.tcltek.co.il ([192.115.133.116]:46674 "EHLO mx.tkos.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230321AbhGZDv2 (ORCPT ); Sun, 25 Jul 2021 23:51:28 -0400 Received: from tarshish (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id 7EC644400D8; Mon, 26 Jul 2021 07:31:43 +0300 (IDT) References: <889aae1b88f120cb6281919d27164a959fbe69d0.1626948070.git.baruch@tkos.co.il> <2c4df635c57085fc33150d1b9a97845694e63e03.1626948070.git.baruch@tkos.co.il> User-agent: mu4e 1.4.15; emacs 27.1 From: Baruch Siach To: Bjorn Andersson Cc: Thierry Reding , Uwe Kleine-K?nig , Lee Jones , Andy Gross , Balaji Prakash J , Rob Herring , Robert Marko , Kathiravan T , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 2/4] pwm: driver for qualcomm ipq6018 pwm block In-reply-to: Date: Mon, 26 Jul 2021 07:31:55 +0300 Message-ID: <87czr5wv9g.fsf@tarshish> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Bjorn, On Sun, Jul 25 2021, Bjorn Andersson wrote: > On Thu 22 Jul 05:01 CDT 2021, Baruch Siach wrote: >> + if (IS_ERR(pwm->clk)) >> + return dev_err_probe(dev, PTR_ERR(pwm->clk), >> + "failed to get core clock"); >> + >> + ret = clk_prepare_enable(pwm->clk); > > Not sure if Uwe asked you this already, but do you need to clock the > supply even when the PWM isn't enabled? I guess not. However, tracking clock enable/disable per PWM signal complicates the code. We'd need to balance enables with matching disables in the .remove callback. I'd prefer to leave that as room for future optimization. >> + if (ret) >> + return dev_err_probe(dev, ret, "clock enable failed"); >> + >> + pwm->chip.dev = dev; >> + pwm->chip.ops = &ipq_pwm_ops; >> + pwm->chip.npwm = 4; >> + >> + ret = pwmchip_add(&pwm->chip); > > Depending on above answer you may or may not have the need to ensure the > ordering of clk_disable_unprepare() in the remove function. According to Uwe pwmchip_remove() must precede clock disable: https://lore.kernel.org/linux-arm-msm/20210714201839.kfyqcyvowekc4ejs@pengutronix.de/ How is that related to per PWM signal clock handling? > Otherwise devm_pwmchip_add() would be nice here. Thanks, baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -