Re: [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices

["Björn Töpel" <bjorn@kernel.org>]

Anup Patel <anup@brainfault.org> writes:

> On Thu, Feb 22, 2024 at 6:44 PM Björn Töpel <bjorn@kernel.org> wrote:
>>
>> Anup Patel <apatel@ventanamicro.com> writes:
>>
>> > The Linux PCI framework supports per-device MSI domains for PCI devices
>> > so extend the IMSIC driver to allow PCI per-device MSI domains.
>> >
>> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
>> > ---
>> >  drivers/irqchip/Kconfig                    |  7 +++++
>> >  drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++--
>> >  2 files changed, 40 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
>> > index 85f86e31c996..2fc0cb32341a 100644
>> > --- a/drivers/irqchip/Kconfig
>> > +++ b/drivers/irqchip/Kconfig
>> > @@ -553,6 +553,13 @@ config RISCV_IMSIC
>> >       select GENERIC_IRQ_MATRIX_ALLOCATOR
>> >       select GENERIC_MSI_IRQ
>> >
>> > +config RISCV_IMSIC_PCI
>> > +     bool
>> > +     depends on RISCV_IMSIC
>> > +     depends on PCI
>> > +     depends on PCI_MSI
>> > +     default RISCV_IMSIC
>> > +
>> >  config EXYNOS_IRQ_COMBINER
>> >       bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
>> >       depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
>> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
>> > index e2344fc08dca..90ddcdd0bba5 100644
>> > --- a/drivers/irqchip/irq-riscv-imsic-platform.c
>> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
>> > @@ -14,6 +14,7 @@
>> >  #include <linux/irqdomain.h>
>> >  #include <linux/module.h>
>> >  #include <linux/msi.h>
>> > +#include <linux/pci.h>
>> >  #include <linux/platform_device.h>
>> >  #include <linux/spinlock.h>
>> >  #include <linux/smp.h>
>> > @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = {
>> >  #endif
>> >  };
>> >
>> > +#ifdef CONFIG_RISCV_IMSIC_PCI
>> > +
>> > +static void imsic_pci_mask_irq(struct irq_data *d)
>> > +{
>> > +     pci_msi_mask_irq(d);
>> > +     irq_chip_mask_parent(d);
>> > +}
>> > +
>> > +static void imsic_pci_unmask_irq(struct irq_data *d)
>> > +{
>> > +     irq_chip_unmask_parent(d);
>> > +     pci_msi_unmask_irq(d);
>> > +}
>> > +
>> > +#define MATCH_PCI_MSI                BIT(DOMAIN_BUS_PCI_MSI)
>> > +
>> > +#else
>> > +
>> > +#define MATCH_PCI_MSI                0
>> > +
>> > +#endif
>> > +
>> >  static bool imsic_init_dev_msi_info(struct device *dev,
>> >                                   struct irq_domain *domain,
>> >                                   struct irq_domain *real_parent,
>> > @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev,
>> >
>> >       /* Is the target supported? */
>> >       switch (info->bus_token) {
>> > +#ifdef CONFIG_RISCV_IMSIC_PCI
>> > +     case DOMAIN_BUS_PCI_DEVICE_MSI:
>> > +     case DOMAIN_BUS_PCI_DEVICE_MSIX:
>> > +             info->chip->irq_mask = imsic_pci_mask_irq;
>> > +             info->chip->irq_unmask = imsic_pci_unmask_irq;
>>
>> irq_set_affinity()?
>
> It's already set by the switch-case above.

Ah, right -- the new .bus_select_token! Thank you!