From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
Aleksandar Rikalo <arikalo@gmail.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
Theo Lebrun <theo.lebrun@bootlin.com>,
Arnd Bergmann <arnd@arndb.de>,
devicetree@vger.kernel.org,
Djordje Todorovic <djordje.todorovic@htecgroup.com>,
Chao-ying Fu <cfu@wavecomp.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Greg Ungerer <gerg@kernel.org>, Hauke Mehrtens <hauke@hauke-m.de>,
Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>,
linux-kernel@vger.kernel.org,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
Marc Zyngier <maz@kernel.org>,
"paulburton@kernel.org" <paulburton@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Serge Semin <fancer.lancer@gmail.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: Re: [PATCH v8 10/13] dt-bindings: mips: cpu: Add property for broken HCI information
Date: Thu, 31 Oct 2024 09:13:57 +0100 [thread overview]
Message-ID: <87jzdoadve.fsf@BLaptop.bootlin.com> (raw)
In-Reply-To: <378f8b70-12d9-4ec3-a1e5-35bd992bfc90@app.fastmail.com>
Hi Jiaxun,
> 在2024年10月29日十月 下午4:11,Jiaxun Yang写道:
>> 在2024年10月29日十月 下午12:21,Aleksandar Rikalo写道:
>> [...]
>>>
>>>> Is this property applicable for all MIPS vendors? There is no vendor
>>>> prefix here, so this is generic for this architecture, right?
>>
>> I'd say the best vendor prefix is mti in this case.
>>
>> CM3 IP block is supplied by MIPS Technology, it is not a part of MIPS
>> architecture spec.
>
> I just tried to revise this problem and I think a better approach would
> be picking my CM binding [1] patch and add this as a property to CM binding.
>
> You don't need to pick rest of that series, this binding alone is sufficient,
> and it's already being reviewed.
>
> Thanks
> [1]:
> https://lore.kernel.org/all/20240612-cm_probe-v2-5-a5b55440563c@flygoat.com/
I had a look at your series and it seems that all the issues raised were
solved, so why wasn't it merged?
Regarding the binding in particular: If we add the property
"cm3-l2-config-hci-broken", then it should be optional. However, the reg
property also should be optional. Indeed, if we can detect the CM
address, we shouldn't use a reg property.
If we go in this direction, not only will the binding be modified but
also code in arch/mips/kernel/mips-cm.c to handle this new property and
manage the case where the reg is not needed. Additionally, we'll need to
modify code in arch/mips/kernel/smp-cps.c to retrieve information about
the HCI.
I can write a series to illustrate it, if needed.
Gregory
>>
>> Thanks
>> --
>> - Jiaxun
>
> --
> - Jiaxun
--
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2024-10-31 8:14 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-28 17:59 [PATCH v8 00/13] MIPS: Support I6500 multi-cluster configuration Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 01/13] irqchip/mips-gic: Introduce for_each_online_cpu_gic() Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 02/13] irqchip/mips-gic: Support multi-cluster in for_each_online_cpu_gic() Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 03/13] irqchip/mips-gic: Setup defaults in each cluster Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 04/13] irqchip/mips-gic: Multi-cluster support Aleksandar Rikalo
2024-10-28 19:45 ` Thomas Gleixner
2024-10-28 17:59 ` [PATCH v8 05/13] clocksource: mips-gic-timer: Always use cluster 0 counter as clocksource Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 06/13] clocksource: mips-gic-timer: Enable counter when CPUs start Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 07/13] MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 08/13] MIPS: CPS: Introduce struct cluster_boot_config Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 09/13] MIPS: CPS: Boot CPUs in secondary clusters Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 10/13] dt-bindings: mips: cpu: Add property for broken HCI information Aleksandar Rikalo
2024-10-29 7:03 ` Krzysztof Kozlowski
2024-10-29 12:21 ` Aleksandar Rikalo
2024-10-29 16:08 ` Gregory CLEMENT
2024-10-29 16:11 ` Jiaxun Yang
2024-10-30 11:35 ` Jiaxun Yang
2024-10-31 8:13 ` Gregory CLEMENT [this message]
2024-10-31 14:42 ` Thomas Bogendoerfer
2024-10-31 15:27 ` Jiaxun Yang
2024-10-28 17:59 ` [PATCH v8 11/13] MIPS: CPS: Support broken HCI for multicluster Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 12/13] MIPS: mobileye: dts: eyeq6h: Enable cluster support Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 13/13] irqchip: mips-gic: Handle case with cluster without CPU cores Aleksandar Rikalo
2024-10-30 11:39 ` [PATCH v8 00/13] MIPS: Support I6500 multi-cluster configuration Jiaxun Yang
2024-11-01 1:47 ` Maciej W. Rozycki
2025-01-22 15:06 ` Gregory CLEMENT
2025-01-23 10:19 ` Aleksandar Rikalo
2025-01-23 15:35 ` Gregory CLEMENT
2025-02-19 10:46 ` Aleksandar Rikalo
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