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Thu, 12 Feb 2026 11:55:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1770893751; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=E2SMN+BIfw5yU3tNiYXzFDMuLU0QrZTEoxC8Qr6cOtk=; b=ze2iH1Q7JcOz3PC+1edI9DyH7FNgeY2O/SqrulLsEv+NNy0oxvIX3GGxJTSk7qaSMfkM+Q ft82KE/dEwzOAoPrZdPoXJ+7x4NmsygE/QB9YV16Lsthl2Yj/o8C/5c5zMDW1HPgLSCvSP +qHMc7x2dw8FCchLABwuDBVsyWChf70KJQ82NbXynGKAPrgvr0EEXh6x9NsBbhOUYdDEjx bgZ+Sjdib7mQ0xCZ7PWQMFuSiwbzXmzQv/VfwLyhkOoZ/ChlRb3TiPhn7fHfIQQy8/aXYt 7zsb4fjmm1EbdBm7he/Ybaw31NriUvag3ZVV8Q0iDJ9QgoxjR/8Q84xjbNLobA== From: Miquel Raynal To: Cheng Ming Lin Cc: Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tudor Ambarus , Mikhail Kshevetskiy , Pablo Martin-Gomez , Tianling Shen , Pratyush Yadav , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: Re: [PATCH v5 3/3] mtd: spi-nand: macronix: Enable randomizer support In-Reply-To: <20260211100553.907585-4-linchengming884@gmail.com> (Cheng Ming Lin's message of "Wed, 11 Feb 2026 18:05:53 +0800") References: <20260211100553.907585-1-linchengming884@gmail.com> <20260211100553.907585-4-linchengming884@gmail.com> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Thu, 12 Feb 2026 11:55:43 +0100 Message-ID: <87ldgyxmc0.fsf@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 On 11/02/2026 at 18:05:53 +08, Cheng Ming Lin w= rote: > From: Cheng Ming Lin > > Implement the 'set_randomizer' callback for Macronix SPI NAND chips. > The randomizer is enabled by setting bit 1 of the Configuration Register > (address 0x10). > > This patch adds support for the following chips: > - MX35LFxG24AD series > - MX35UFxG24AD series > > When the randomizer is enabled, data is scrambled internally during > program operations and automatically descrambled during read operations. > This helps reduce bit errors caused by program disturbance. > > Signed-off-by: Cheng Ming Lin > --- > drivers/mtd/nand/spi/macronix.c | 46 +++++++++++++++++++++++++-------- > 1 file changed, 35 insertions(+), 11 deletions(-) > > diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macro= nix.c > index edf63b9996cf..3a9ab146426b 100644 > --- a/drivers/mtd/nand/spi/macronix.c > +++ b/drivers/mtd/nand/spi/macronix.c > @@ -14,6 +14,8 @@ > #define MACRONIX_ECCSR_BF_LAST_PAGE(eccsr) FIELD_GET(GENMASK(3, 0), eccs= r) > #define MACRONIX_ECCSR_BF_ACCUMULATED_PAGES(eccsr) FIELD_GET(GENMASK(7, = 4), eccsr) > #define MACRONIX_CFG_CONT_READ BIT(2) > +#define MACRONIX_CFG_RANDOMIZER_EN BIT(1) > +#define MACRONIX_FEATURE_ADDR_RANDOMIZER 0x10 > #define MACRONIX_FEATURE_ADDR_READ_RETRY 0x70 > #define MACRONIX_NUM_READ_RETRY_MODES 5 >=20=20 > @@ -146,7 +148,7 @@ static int macronix_set_cont_read(struct spinand_devi= ce *spinand, bool enable) > * Return: 0 on success, a negative error code otherwise. > */ > static int macronix_set_read_retry(struct spinand_device *spinand, > - unsigned int retry_mode) > + unsigned int retry_mode) This is unrelated, it should be in an other commit. > { > struct spi_mem_op op =3D SPINAND_SET_FEATURE_1S_1S_1S_OP(MACRONIX_FEATU= RE_ADDR_READ_RETRY, > spinand->scratchbuf); > @@ -155,6 +157,18 @@ static int macronix_set_read_retry(struct spinand_de= vice *spinand, > return spi_mem_exec_op(spinand->spimem, &op); > } >=20=20 > +static int macronix_set_randomizer(struct spinand_device *spinand, bool = enable) > +{ > + int ret; > + > + ret =3D spinand_write_reg_op(spinand, MACRONIX_FEATURE_ADDR_RANDOMIZER, > + enable ? MACRONIX_CFG_RANDOMIZER_EN : > 0); You can directly return. Same in the core BTW. Otherwise with this and the binding document fixed, looks ok. Thanks, Miqu=C3=A8l