From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04ABAF4F0 for ; Wed, 25 Oct 2023 12:07:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from hsmtpd-def.xspmail.jp (hsmtpd-def.xspmail.jp [202.238.198.238]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAC41137 for ; Wed, 25 Oct 2023 05:07:43 -0700 (PDT) X-Country-Code: JP Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by hsmtpd-out-0.asahinet.cluster.xspmail.jp (Halon) with ESMTPA id 2de58641-3c7d-49c8-acd6-6a337b70d28a; Wed, 25 Oct 2023 21:07:42 +0900 (JST) Received: from SIOS1075.ysato.ml (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 45E191C0037; Wed, 25 Oct 2023 21:07:41 +0900 (JST) Date: Wed, 25 Oct 2023 21:07:40 +0900 Message-ID: <87lebq7vn7.wl-ysato@users.sourceforge.jp> From: Yoshinori Sato To: "D. Jeff Dionne" Cc: Geert Uytterhoeven , linux-sh@vger.kernel.org, glaubitz@physik.fu-berlin.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org Subject: Re: [RFC PATCH v3 25/35] Documentation/devicetree/bindings/sh/cpus.yaml: Add SH CPU. In-Reply-To: References: <46ef748dd27127ef9b39fa6c97fe51e8d3422a4f.1697199949.git.ysato@users.sourceforge.jp> <87ttqf6jjq.wl-ysato@users.sourceforge.jp> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Wed, 25 Oct 2023 20:33:07 +0900, D. Jeff Dionne wrote: >=20 > Hi Sato-san, >=20 > We must not imply that Renesas is responsible for J2, or that it is a san= ctioned SH core. >=20 > J-Core has the responsibility for maintenance of those SH ISA compatible = cores. > Yes. I know. I intended to write about ISA compatibility. > J. >=20 > > On Oct 25, 2023, at 20:14, Yoshinori Sato = wrote: > >=20 > > On Wed, 18 Oct 2023 23:27:43 +0900, > > Geert Uytterhoeven wrote: > >>=20 > >> Hi Sato-san, > >>=20 > >> On Sat, Oct 14, 2023 at 4:54=E2=80=AFPM Yoshinori Sato > >> wrote: > >>> Renesas SuperH binding definition. > >>>=20 > >>> Signed-off-by: Yoshinori Sato > >>=20 > >> Thanks for your patch! > >>=20 > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/sh/cpus.yaml > >>> @@ -0,0 +1,45 @@ > >>> +# SPDX-License-Identifier: GPL-2.0 > >>> +%YAML 1.2 > >>> +--- > >>> +$id: http://devicetree.org/schemas/sh/cpus.yaml# > >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>> + > >>> +title: Renesas SuperH CPUs > >>> + > >>> +maintainers: > >>> + - Yoshinori Sato > >>> + > >>> +description: |+ > >>> + The device tree allows to describe the layout of CPUs in a system = through > >>> + the "cpus" node, which in turn contains a number of subnodes (ie "= cpu") > >>> + defining properties for every cpu. > >>> + > >>> + Bindings for CPU nodes follow the Devicetree Specification, availa= ble from: > >>> + > >>> + https://www.devicetree.org/specifications/ > >>> + > >>> +properties: > >>> + compatible: > >>> + items: > >>> + - enum: > >>=20 > >> Missing > >>=20 > >> - jcore,j2 > >>=20 > >>> + - renesas,sh4 > >>=20 > >>=20 > >>> + - const: renesas,sh > >>=20 > >> I see arch/sh/boot/dts/j2_mimas_v2.dts lacks the fallback to > >> "renesas,sh", though. > >> Is there a common base of instructions that are available on all SH co= res? > >=20 > > The base instruction set is sh2. > > Before that, there is sh1, but this is not compatible with Linux. > > I think it would be a good idea to change this to "renesas,sh2", > > but the SH7619 (SH2 CPU) would look like the following. > > cpus { > > cpu: cpu@0 { > > compatible =3D "renesas,sh2", "renesas,sh2"; > > }; > > }; > >=20 > >> Missing reg property. > >> Missing "device_type: true". > >>=20 > >>> + > >>> + clock-frequency: > >>> + $ref: /schemas/types.yaml#/definitions/uint32 > >>> + description: | > >>> + CPU core clock freqency. > >>=20 > >> Perhaps a "clocks" property instead, or as an alternative? > >>=20 > >> On sh7750, you do have > >>=20 > >> clocks =3D <&cpg SH7750_CPG_ICK>; > >>=20 > >>> + > >>> +required: > >>> + - compatible > >>> + > >>> +additionalProperties: true > >>> + > >>> +examples: > >>> + - | > >>> + cpus { > >>=20 > >> make dt_binding_check > >> DT_SCHEMA_FILES=3DDocumentation/devicetree/bindings/sh/cpus.yaml: > >>=20 > >> Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: > >> '#address-cells' is a required property > >> from schema $id: http://devicetree.org/schemas/cpus.yaml# > >> Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: > >> '#size-cells' is a required property > >> from schema $id: http://devicetree.org/schemas/cpus.yaml# > >>=20 > >>> + cpu: cpu@0 { > >>> + compatible =3D "renesas,sh4", "renesas,sh"; > >>=20 > >> Documentation/devicetree/bindings/sh/cpus.example.dts:19.28-21.19: > >> Warning (unit_address_vs_reg): /example-0/cpus/cpu@0: node has a unit > >> name, but no reg or ranges property > >> Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: cpu@0: > >> 'cache-level' is a required property > >> from schema $id: http://devicetree.org/schemas/cpus.yaml# > >>=20 > >>> + }; > >>> + }; > >>> +... > >>=20 > >> Gr{oetje,eeting}s, > >>=20 > >> Geert > >>=20 > >> --=20 > >> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux= -m68k.org > >>=20 > >> In personal conversations with technical people, I call myself a hacke= r. But > >> when I'm talking to journalists I just say "programmer" or something l= ike that. > >> -- Linus Torvalds > >=20 > > --=20 > > Yosinori Sato >=20 --=20 Yosinori Sato