From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09BEEC433F5 for ; Fri, 17 Sep 2021 09:21:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E7A9A611C3 for ; Fri, 17 Sep 2021 09:21:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240044AbhIQJW3 (ORCPT ); Fri, 17 Sep 2021 05:22:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:45000 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245576AbhIQJUc (ORCPT ); Fri, 17 Sep 2021 05:20:32 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D385B6103B; Fri, 17 Sep 2021 09:19:05 +0000 (UTC) Received: from [198.52.44.129] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mRA1P-00BKtD-Ro; Fri, 17 Sep 2021 10:19:03 +0100 Date: Fri, 17 Sep 2021 10:19:02 +0100 Message-ID: <87mtobblvd.wl-maz@kernel.org> From: Marc Zyngier To: Mark Kettenis Cc: sven@svenpeter.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, kw@linux.com, alyssa@rosenzweig.io, stan@corellium.com, kettenis@openbsd.org, marcan@marcan.st, Robin.Murphy@arm.com, kernel-team@android.com Subject: Re: [PATCH v3 10/10] PCI: apple: Configure RID to SID mapper on device addition In-Reply-To: <56145a72aa978ebd@bloch.sibelius.xs4all.nl> References: <20210913182550.264165-1-maz@kernel.org> <20210913182550.264165-11-maz@kernel.org> <87y27zbiu3.wl-maz@kernel.org> <56145a72aa978ebd@bloch.sibelius.xs4all.nl> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 198.52.44.129 X-SA-Exim-Rcpt-To: mark.kettenis@xs4all.nl, sven@svenpeter.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, kw@linux.com, alyssa@rosenzweig.io, stan@corellium.com, kettenis@openbsd.org, marcan@marcan.st, Robin.Murphy@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 14 Sep 2021 10:56:05 +0100, Mark Kettenis wrote: > > > Date: Tue, 14 Sep 2021 10:35:32 +0100 > > From: Marc Zyngier > > > > On Mon, 13 Sep 2021 21:45:13 +0100, > > "Sven Peter" wrote: > > > > > > On Mon, Sep 13, 2021, at 20:25, Marc Zyngier wrote: > > > > The Apple PCIe controller doesn't directly feed the endpoint's > > > > Requester ID to the IOMMU (DART), but instead maps RIDs onto > > > > Stream IDs (SIDs). The DART and the PCIe controller must thus > > > > agree on the SIDs that are used for translation (by using > > > > the 'iommu-map' property). > > > > > > > > For this purpose, parse the 'iommu-map' property each time a > > > > device gets added, and use the resulting translation to configure > > > > the PCIe RID-to-SID mapper. Similarily, remove the translation > > > > if/when the device gets removed. > > > > > > > > This is all driven from a bus notifier which gets registered at > > > > probe time. Hopefully this is the only PCI controller driver > > > > in the whole system. > > > > > > > > Signed-off-by: Marc Zyngier > > > > --- > > > > drivers/pci/controller/pcie-apple.c | 158 +++++++++++++++++++++++++++- > > > > 1 file changed, 156 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/pcie-apple.c > > > > b/drivers/pci/controller/pcie-apple.c > > > > index 76344223245d..68d71eabe708 100644 > > > > --- a/drivers/pci/controller/pcie-apple.c > > > > +++ b/drivers/pci/controller/pcie-apple.c > > > > @@ -23,8 +23,10 @@ > > > > #include > > > > #include > > > > #include > > > > +#include > > > > #include > > > > #include > > > > +#include > > > > #include > > > > #include > > > > > > > > @@ -116,6 +118,8 @@ > > > > #define PORT_TUNSTAT_PERST_ACK_PEND BIT(1) > > > > #define PORT_PREFMEM_ENABLE 0x00994 > > > > > > > > +#define MAX_RID2SID 64 > > > > > > Do these actually have 64 slots? I thought that was only for > > > the Thunderbolt controllers and that these only had 16. > > > > You are indeed right, and I blindly used the limit used in the > > Correlium driver. Using entries from 16 onward result in a non booting > > system. The registers do not fault though, and simply ignore writes. I > > came up with an simple fix for this, see below. > > Or should be add a property to the DT binding to indicate the number > of entries (using a default of 16)? We don't have to add that > property right away; we can delay that until we actually try to > support the Thunderbolt ports. I'd rather only add a property for things we cannot discover ourselves. And indeed, we don't have to decide on this right now. > In case you didn't know already, RIDs that have no mapping in the > RID2SID table map to SID 0. That's why I picked 1 as the SID in the > iommu-map property for the port. I sort-off guessed, as using 0 made everything work by 'magic', while using your DT prevented the machine from booting. I tend to dislike magic, hence this patch. > > > > I never checked it myself though and it doesn't make much > > > of a difference for now since only four different RIDs will > > > ever be connected anyway. > > > > Four? I guess the radios expose more than a single RID? > > At this point, on the M1 mini there is the Broadcom BCM4378 WiFi/BT > device (which has two functions), the Fresco Logic FL1100 xHCI > controller (single function) and the Broadcom BCM57765 Ethernet > controller. So yes, there are for RIDs. But as far as I can see, the RID-to-SID mapping is per port. So at most, we have two RIDs per port/DART, not four. Or am I missing something altogether? M. -- Without deviation from the norm, progress is not possible.