From: Marc Zyngier <maz@kernel.org>
To: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Cc: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org,
Kever Yang <kever.yang@rock-chips.com>,
XiaoDong Huang <derrick.huang@rock-chips.com>,
Peter Geis <pgwipeout@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
kernel@collabora.com
Subject: Re: [PATCH v1 3/4] arm64: dts: rockchip: rk356x: Add MSI controller node
Date: Sun, 16 Feb 2025 09:59:58 +0000 [thread overview]
Message-ID: <87r03y1a75.wl-maz@kernel.org> (raw)
In-Reply-To: <20250215235431.143138-4-dmitry.osipenko@collabora.com>
On Sat, 15 Feb 2025 23:54:30 +0000,
Dmitry Osipenko <dmitry.osipenko@collabora.com> wrote:
>
> Rockchip 356x SoC's GIC has two hardware integration issues that
> affect MSI functionality of the GIC. Previously, both these GIC
> limitations were worked around by using MBI for MSI instead of ITS
> because kernel GIC driver didn't have necessary quirks.
>
> The first limitation is about RK356x GIC not supporting programmable
> shareability. Rockchip assigned Errata ID #3568001 for this issue.
>
> Second limitation is about GIC AXI master interface addressing only
> first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue.
>
> Now that kernel supports quirks for both of the erratums, add
> MSI controller node to RK356x device-tree.
>
> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> index 28be38b7182e..423185686600 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> @@ -284,7 +284,18 @@ gic: interrupt-controller@fd400000 {
> mbi-alias = <0x0 0xfd410000>;
> mbi-ranges = <296 24>;
> msi-controller;
> + ranges;
> + #address-cells = <2>;
> + #size-cells = <2>;
> dma-noncoherent;
> +
> + its: msi-controller@fd440000 {
> + compatible = "arm,gic-v3-its";
> + reg = <0x0 0xfd440000 0 0x20000>;
> + dma-noncoherent;
> + msi-controller;
> + #msi-cells = <1>;
> + };
> };
>
> usb_host0_ehci: usb@fd800000 {
You can merge this patch with the previous one. Marking the GIC
non-coherent is pointless if no ITS is available, because there is no
point in allocating memory for them.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2025-02-16 10:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-15 23:54 [PATCH v1 0/4] Add Rockchip 3568001/2 errata workarounds and enable ITS on RK356x Dmitry Osipenko
2025-02-15 23:54 ` [PATCH v1 1/4] irqchip/gic-v3: Add Rockchip 3568002 erratum workaround Dmitry Osipenko
2025-02-16 9:55 ` Marc Zyngier
2025-02-16 15:25 ` Dmitry Osipenko
2025-02-16 18:21 ` Marc Zyngier
2025-02-15 23:54 ` [PATCH v1 2/4] arm64: dts: rockchip: rk356x: Add dma-noncoherent property to GIC node Dmitry Osipenko
2025-02-15 23:54 ` [PATCH v1 3/4] arm64: dts: rockchip: rk356x: Add MSI controller node Dmitry Osipenko
2025-02-16 9:59 ` Marc Zyngier [this message]
2025-02-16 15:26 ` Dmitry Osipenko
2025-02-15 23:54 ` [PATCH v1 4/4] arm64: dts: rockchip: rk356x: Move PCIe MSI to use GIC ITS instead of MBI Dmitry Osipenko
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