From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 521E618DB1A; Sun, 16 Feb 2025 10:00:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739700002; cv=none; b=nQKwTpm717mDT/Q8xJPVuYbmJzEtakEFPgHyglmOIV2pBQ5oEwqpOtu6ha6oiKySAtgmzM0+sWeHnZB+9+b/TjEXG0/0+VDrXDg6ajBQx8Npvxuxngmiuf5QPbB6bhEn9sdm86qPnN1OYmvUt11+fv8st663o8jO4qMtSQ5GrLo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739700002; c=relaxed/simple; bh=gVeX3dBdYmZQsryIB7Wq4wt/LHImRZlGSznWXeC+bdQ=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=mjqWUE7+1wzxourds9BTcdy0RPJ8YEv6WPuxdLU7VJlHY6xvZN6XDFIlUhnbdPzipybVSr+k6xDXKr+gZ+jUsN+Fs7qQLmavIFN85rJIzZmJPYiQ9EyrUTgq8A7EM9Tmu7z0pJZtywmjJTBnlkvZ65JB4B5T8bQ2PIEH+qzQlgk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eEGjhidv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eEGjhidv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B172FC4CEDD; Sun, 16 Feb 2025 10:00:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739700001; bh=gVeX3dBdYmZQsryIB7Wq4wt/LHImRZlGSznWXeC+bdQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=eEGjhidvFztftvpNvYUBUCPEIHS4fTn9lXgf8jDC2vKsbpB6MK5zjnxZIWIegh3bM ZpGU/kTh9YqM84sssA7R+vGmQrOhGaxWisZbLmfoKgu1TV/KsgwsHnoWPUCk4LxMr8 Y3DaKX464/DBmfY8c/dGY+3XF7UKO73kbUG9OF4av0aqJoR/cLga3E5hqJWV7OiiTb DMW3fsavmlFLPpmwR63oMikDdLSE4pUBKBPUeEYsgKMVISVhSBKWnANzdnHI48Kpln UFPlwKR/XK/w5je/zZQh7RvcfY7RrJxrjwj8iXcoKnO6Bsg4/txasKViAbUMX6ox+h auUuwfdWbMGrA== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tjbRP-004WsE-AG; Sun, 16 Feb 2025 09:59:59 +0000 Date: Sun, 16 Feb 2025 09:59:58 +0000 Message-ID: <87r03y1a75.wl-maz@kernel.org> From: Marc Zyngier To: Dmitry Osipenko Cc: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Kever Yang , XiaoDong Huang , Peter Geis , Robin Murphy , kernel@collabora.com Subject: Re: [PATCH v1 3/4] arm64: dts: rockchip: rk356x: Add MSI controller node In-Reply-To: <20250215235431.143138-4-dmitry.osipenko@collabora.com> References: <20250215235431.143138-1-dmitry.osipenko@collabora.com> <20250215235431.143138-4-dmitry.osipenko@collabora.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: dmitry.osipenko@collabora.com, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, derrick.huang@rock-chips.com, pgwipeout@gmail.com, robin.murphy@arm.com, kernel@collabora.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sat, 15 Feb 2025 23:54:30 +0000, Dmitry Osipenko wrote: > > Rockchip 356x SoC's GIC has two hardware integration issues that > affect MSI functionality of the GIC. Previously, both these GIC > limitations were worked around by using MBI for MSI instead of ITS > because kernel GIC driver didn't have necessary quirks. > > The first limitation is about RK356x GIC not supporting programmable > shareability. Rockchip assigned Errata ID #3568001 for this issue. > > Second limitation is about GIC AXI master interface addressing only > first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue. > > Now that kernel supports quirks for both of the erratums, add > MSI controller node to RK356x device-tree. > > Signed-off-by: Dmitry Osipenko > --- > arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > index 28be38b7182e..423185686600 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > @@ -284,7 +284,18 @@ gic: interrupt-controller@fd400000 { > mbi-alias = <0x0 0xfd410000>; > mbi-ranges = <296 24>; > msi-controller; > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; > dma-noncoherent; > + > + its: msi-controller@fd440000 { > + compatible = "arm,gic-v3-its"; > + reg = <0x0 0xfd440000 0 0x20000>; > + dma-noncoherent; > + msi-controller; > + #msi-cells = <1>; > + }; > }; > > usb_host0_ehci: usb@fd800000 { You can merge this patch with the previous one. Marking the GIC non-coherent is pointless if no ITS is available, because there is no point in allocating memory for them. Thanks, M. -- Without deviation from the norm, progress is not possible.