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From: Marc Zyngier <maz@kernel.org>
To: Peter Geis <pgwipeout@gmail.com>
Cc: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	PCI <linux-pci@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 2/4] PCI: dwc: rockchip: add legacy interrupt support
Date: Tue, 19 Apr 2022 09:05:50 +0100	[thread overview]
Message-ID: <87r15ta469.wl-maz@kernel.org> (raw)
In-Reply-To: <CAMdYzYqfitnPYSUEeeUB=x9=L9xzAu6o0SBmEdF8WKeb-+b6uQ@mail.gmail.com>

On Tue, 19 Apr 2022 01:23:23 +0100,
Peter Geis <pgwipeout@gmail.com> wrote:
> 
> > My only ask is that you properly initialise the HW. This will save
> > countless amount of head-scratching once you have a decent firmware or
> > kexec.
> 
> The only way to ensure that in a sane way is to trigger the resets at
> driver probe.

If that can be done, that'd be great.

> Can that be safely done without causing other issues with an already
> configured card or should I power cycle it as well?

Well, you are already renegotiating the link anyway, so that's a very
moot point.

> This is starting to feature creep from the original intention of this
> series, since a pre-configured controller would affect more than just
> interrupts.

Configuring the HW is not exactly a feature creep. If your intention
is to keep everything as it was left, then you don't have much of a
driver, but instead a time bomb. And we can do without another one in
the tree.

> If you wish, as a compromise I can ensure all INTx interrupts are
> masked at probe (which would hilariously be the opposite of
> downstream).

As far as I'm concerned, downstream doesn't exist. If someone wants
the downstream code, they can use it directly and we don't need to
merge this code.

If, on the other hand, you want this driver to be useful and to be
maintained upstream, initialising the interrupt mask is the absolute
bare minimum.

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2022-04-19  8:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-16 11:05 [PATCH v7 0/4] Enable rk356x PCIe controller Peter Geis
2022-04-16 11:05 ` [PATCH v7 1/4] dt-bindings: pci: remove fallback from Rockchip DesignWare binding Peter Geis
2022-04-20 16:27   ` Rob Herring
2022-04-16 11:05 ` [PATCH v7 2/4] PCI: dwc: rockchip: add legacy interrupt support Peter Geis
2022-04-16 12:54   ` Marc Zyngier
2022-04-16 13:24     ` Peter Geis
2022-04-17  9:53       ` Marc Zyngier
2022-04-18 11:37         ` Peter Geis
2022-04-18 12:34           ` Marc Zyngier
2022-04-18 15:13             ` Peter Geis
2022-04-18 22:53               ` Marc Zyngier
2022-04-19  0:23                 ` Peter Geis
2022-04-19  8:05                   ` Marc Zyngier [this message]
2022-04-19 20:37                     ` Peter Geis
2022-04-16 11:05 ` [PATCH v7 3/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Peter Geis
2022-04-16 11:05 ` [PATCH v7 4/4] arm64: dts: rockchip: enable pcie controller on quartz64-a Peter Geis

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