From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09DBEC433FE for ; Tue, 19 Apr 2022 08:05:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238639AbiDSIIi (ORCPT ); Tue, 19 Apr 2022 04:08:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236973AbiDSIIh (ORCPT ); Tue, 19 Apr 2022 04:08:37 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 544921CB05; Tue, 19 Apr 2022 01:05:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0DDA6B810FD; Tue, 19 Apr 2022 08:05:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B9292C385A7; Tue, 19 Apr 2022 08:05:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650355552; bh=uy5PsnK0LjX3h5KU565Xiqn4RBI19MrcfxohTC+2imw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=JExSwVWVtC4u5B6tkqsibiY9RDlqofZAjhrIPunP/eWBnWS3b8Q/jaPiYM3g4hJfr 1jnIu19DwciEUjfLJp/Q1QinwHCmU4zca8916I1MHH7eErP2VjBy661vUksnvb47fg xEzDXauhRLXeDcb35Apt7Kpldr39XqlXsj7LFo3qA10Ud+AbdamomNDW1PO8Hioh0D vmL/VF1xTo9V9+AiOO+y9pkKIa4wolGhIgEDG99TkPTA3ZuEYyyzYie4MmcOkxxlwb 9uepJ9omG+5rG8cotmcu2FJGwqYLVpRKzk719U3lUuULflMw0OolN01CmwAHyKeC6U PYjv9L0XopJQA== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ngiru-005GGn-B0; Tue, 19 Apr 2022 09:05:50 +0100 Date: Tue, 19 Apr 2022 09:05:50 +0100 Message-ID: <87r15ta469.wl-maz@kernel.org> From: Marc Zyngier To: Peter Geis Cc: Lorenzo Pieralisi , Rob Herring , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Bjorn Helgaas , Heiko Stuebner , "open list:ARM/Rockchip SoC..." , PCI , devicetree , arm-mail-list , Linux Kernel Mailing List Subject: Re: [PATCH v7 2/4] PCI: dwc: rockchip: add legacy interrupt support In-Reply-To: References: <20220416110507.642398-1-pgwipeout@gmail.com> <20220416110507.642398-3-pgwipeout@gmail.com> <308e9c47197d4f7ae5a31cfcb5a10886@kernel.org> <87zgkk9gtc.wl-maz@kernel.org> <87sfqaa7uv.wl-maz@kernel.org> <878rs2c8ay.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: pgwipeout@gmail.com, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, heiko@sntech.de, linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 19 Apr 2022 01:23:23 +0100, Peter Geis wrote: > > > My only ask is that you properly initialise the HW. This will save > > countless amount of head-scratching once you have a decent firmware or > > kexec. > > The only way to ensure that in a sane way is to trigger the resets at > driver probe. If that can be done, that'd be great. > Can that be safely done without causing other issues with an already > configured card or should I power cycle it as well? Well, you are already renegotiating the link anyway, so that's a very moot point. > This is starting to feature creep from the original intention of this > series, since a pre-configured controller would affect more than just > interrupts. Configuring the HW is not exactly a feature creep. If your intention is to keep everything as it was left, then you don't have much of a driver, but instead a time bomb. And we can do without another one in the tree. > If you wish, as a compromise I can ensure all INTx interrupts are > masked at probe (which would hilariously be the opposite of > downstream). As far as I'm concerned, downstream doesn't exist. If someone wants the downstream code, they can use it directly and we don't need to merge this code. If, on the other hand, you want this driver to be useful and to be maintained upstream, initialising the interrupt mask is the absolute bare minimum. M. -- Without deviation from the norm, progress is not possible.