From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C323C433EF for ; Thu, 24 Feb 2022 19:06:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233215AbiBXTGt (ORCPT ); Thu, 24 Feb 2022 14:06:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232426AbiBXTGq (ORCPT ); Thu, 24 Feb 2022 14:06:46 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 490811E694F; Thu, 24 Feb 2022 11:06:16 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E1F2F614FE; Thu, 24 Feb 2022 19:06:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 44A61C340E9; Thu, 24 Feb 2022 19:06:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645729575; bh=yWJ6YhGeyBeU7o/OwUS2Ro51OSyUNTGPsg4tn9Bj88c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=b1gEUz7fGCIASjUA1yupDQvuOv+j23rOHl306CBdNVhYBa7t6JkjiYjMbHaD0wCAC 0LtfOBAZhRlNs3YGjFXwhRdRn051qE/olNc5jVCvDQysKDVRPSHfjlDNXHpLQPk6Vg jDir6M0vwnndwwEf6gzd4/06GLjaVCQ8jWE8WH7YZ3aYLDzHpcdL3dd6ay6dY86qSv KWgcdLf6BOKifggs0EW/7H54kZZoWRSAvj2R8dCYNabBfz2cgxrhOuNWUSaMjLwWzP 3yy0J69znc9HqNU7ugUg3vYxDbzQHeRtLCy9Km05wWTiEyI0sRcQ7FuhOqEeI8DK/S Jz0813X8Jh1uw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nNJRN-00AHfN-33; Thu, 24 Feb 2022 19:06:13 +0000 Date: Thu, 24 Feb 2022 19:06:12 +0000 Message-ID: <87r17s2ifv.wl-maz@kernel.org> From: Marc Zyngier To: Hector Martin , Mark Rutland Cc: Thomas Gleixner , Rob Herring , Sven Peter , Alyssa Rosenzweig , Mark Kettenis , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 0/7] irqchip/apple-aic: Add support for AICv2 In-Reply-To: References: <20220224130741.63924-1-marcan@marcan.st> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marcan@marcan.st, mark.rutland@arm.com, tglx@linutronix.de, robh+dt@kernel.org, sven@svenpeter.dev, alyssa@rosenzweig.io, mark.kettenis@xs4all.nl, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, 24 Feb 2022 18:26:41 +0000, Mark Rutland wrote: > > On Thu, Feb 24, 2022 at 10:07:34PM +0900, Hector Martin wrote: > > Hi folks, > > Hi Hector, > > > In the t6000/t6001 (M1 Pro / Max) SoCs, Apple introduced a new version > > of their interrupt controller. This is a significant departure from > > AICv1 and seems designed to better scale to larger chips. This series > > adds support for it to the existing AIC driver. > > > > Gone are CPU affinities; instead there seems to be some kind of > > "automagic" dispatch to willing CPU cores, and cores can also opt-out > > via an IMP-DEF sysreg (!). Right now the bootloader just sets up all > > cores to accept IRQs, and we ignore all this and let the magic > > algorithm pick a CPU to accept the IRQ. > > Maybe that's ok for the set of peripherals attached, but in general that > violates existing expectations regarding affinity, and I fear there'll > be some subtle brokenness resulting from this automatic target > selection. > > For example, in the perf events subsystem there are PMU drivers (even > those for "uncore" or "system" devices which are shared by many/all > CPUs) which rely on a combination of interrupt affinity and local IRQ > masking (without any other locking) to provide exclusion between a PMU's > IRQ handler and any other management operations for that PMU (which are > all handled from the same CPU). It will definitely break anything that relies on managed interrupts, where the kernel expects to allocate interrupts that have a strict affinity. Drivers using this feature can legitimately expect that they can keep their state in per-CPU pointers, and that obviously breaks. This may affect any PCIe device with more than a couple of queues. Maybe users of this HW do not care (yet), but we'll have to find a way to tell drivers of the limitation. M. -- Without deviation from the norm, progress is not possible.