From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90ED6C433EF for ; Sat, 23 Oct 2021 09:06:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6BC146105A for ; Sat, 23 Oct 2021 09:06:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229819AbhJWJIT (ORCPT ); Sat, 23 Oct 2021 05:08:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:57990 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229818AbhJWJIS (ORCPT ); Sat, 23 Oct 2021 05:08:18 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F1DC260FE3; Sat, 23 Oct 2021 09:05:59 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1meCyT-0013eT-MU; Sat, 23 Oct 2021 10:05:57 +0100 Date: Sat, 23 Oct 2021 10:05:57 +0100 Message-ID: <87sfwst8ju.wl-maz@kernel.org> From: Marc Zyngier To: qinjian Cc: tglx@linutronix.de, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/4] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller In-Reply-To: <20211022060737.281116-1-qinjian@cqplus1.com> References: <20211022060737.281116-1-qinjian@cqplus1.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: qinjian@cqplus1.com, tglx@linutronix.de, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, 22 Oct 2021 07:07:37 +0100, qinjian wrote: > > Add documentation to describe Sunplus SP7021 interrupt controller bindings. > > Signed-off-by: qinjian > --- > .../sunplus,sp7021-intc.yaml | 69 +++++++++++++++++++ > MAINTAINERS | 2 + > .../interrupt-controller/sp7021-intc.h | 24 +++++++ > 3 files changed, 95 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml > create mode 100644 include/dt-bindings/interrupt-controller/sp7021-intc.h > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml > new file mode 100644 > index 000000000..73719f65b > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) Sunplus Co., Ltd. 2021 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sunplus SP7021 SoC Interrupt Controller Device Tree Bindings > + > +maintainers: > + - Qin Jian > + > +properties: > + compatible: > + items: > + - const: sunplus,sp7021-intc > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + reg: > + maxItems: 1 > + > + interrupts: > + description: > + Interrupts references to primary interrupt controller > + > + ext0-mask: > + description: > + cpu affinity of EXT_INT0. > + $ref: "/schemas/types.yaml#/definitions/uint32" > + minimum: 1 > + maximum: 16 That's not a description of the HW. This is just a SW policy that trickles into the DT. The output interrupt is simply connected to the parent interrupt controller, and how it is routed is out of the scope of the DT. This (and its ext1 sibling) should be dropped. M. -- Without deviation from the norm, progress is not possible.