From: Thomas Gleixner <tglx@linutronix.de>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Ley Foon Tan <leyfoon.tan@starfivetech.com>,
Jack Zhu <jack.zhu@starfivetech.com>,
Changhuang Liang <changhuang.liang@starfivetech.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 2/2] irqchip: Add StarFive external interrupt controller
Date: Wed, 21 Feb 2024 18:37:56 +0100 [thread overview]
Message-ID: <87ttm1g1l7.ffs@tglx> (raw)
In-Reply-To: <20240221022647.5297-3-changhuang.liang@starfivetech.com>
On Tue, Feb 20 2024 at 18:26, Changhuang Liang wrote:
> +static void starfive_intc_unmask(struct irq_data *d)
> +{
> + struct starfive_irq_chip *irqc = irq_data_get_irq_chip_data(d);
> + unsigned long flags;
> +
> + raw_spin_lock_irqsave(&irqc->lock, flags);
This does not need the _irqsave() variant as this is guaranteed to be
called with interrupts disabled from the core code.
> + starfive_intc_bit_clear(irqc, STARFIVE_INTC_SRC0_MASK, BIT(d->hwirq));
> + raw_spin_unlock_irqrestore(&irqc->lock, flags);
> +}
> + chained_irq_enter(chip, desc);
> +
> + value = ioread32(irqc->base + STARFIVE_INTC_SRC0_INT);
> + while (value) {
> + hwirq = ffs(value) - 1;
> +
> + generic_handle_domain_irq(irqc->domain, hwirq);
> +
> + starfive_intc_bit_set(irqc, STARFIVE_INTC_SRC0_CLEAR, BIT(hwirq));
> + starfive_intc_bit_clear(irqc, STARFIVE_INTC_SRC0_CLEAR, BIT(hwirq));
> +
> + clear_bit(hwirq, &value);
As this is a local variable you really don't want to have the atomic
variant for clearing the bit. __clear_bit() is your friend.
Other than those nitpicks this looks good.
Thanks,
tglx
prev parent reply other threads:[~2024-02-21 17:37 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-21 2:26 [PATCH v3 0/2] Add JH8100 external interrupt controller support Changhuang Liang
2024-02-21 2:26 ` [PATCH v3 1/2] dt-bindings: interrupt-controller: Add starfive,jh8100-intc Changhuang Liang
2024-02-21 2:26 ` [PATCH v3 2/2] irqchip: Add StarFive external interrupt controller Changhuang Liang
2024-02-21 13:24 ` Philipp Zabel
2024-02-21 17:37 ` Thomas Gleixner [this message]
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