From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 177ACC433EF for ; Fri, 22 Jul 2022 07:33:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229538AbiGVHdX (ORCPT ); Fri, 22 Jul 2022 03:33:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234243AbiGVHdW (ORCPT ); Fri, 22 Jul 2022 03:33:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 703B798213; Fri, 22 Jul 2022 00:33:21 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0C283621DE; Fri, 22 Jul 2022 07:33:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E6E8C341C6; Fri, 22 Jul 2022 07:33:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1658475200; bh=g0J/DZPF0EEz3tPDpzapvuFe35w2oC5Odvf9wwZqa8M=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=KJz9xjIKkzRij37j7QmzWAY1vRA9AFGAxNXZutXVyyhSatiqsc8es7iTcnbRcLIa/ K0M39yHcKWLN7ULvJRqFmZj8PXnDdJPyRSNRNBnOPRZtv+I9cJqTEcKD084UyXjnO4 7XCotCxqo+JBVPmSgokfeAhc9OH3coJl0HFK3sWOdhyyUDDlYrzL/JXuOb+cpmP16f z+vJM4iF7lp/4If+Mv3d62C4/5yPhJJ3lkZEuuxAM6CLa2n5EuO8cvVV3jnMfFIHcp L8LTMcN7IvvXslz+I1AvCVGQS+SbOOzPIytPdDMorR5yT//VFu+1CSJcq4rfzjytFc x5vl9g6h7jIHA== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oEn9x-009GbE-KG; Fri, 22 Jul 2022 08:33:17 +0100 Date: Fri, 22 Jul 2022 08:33:17 +0100 Message-ID: <87tu79y536.wl-maz@kernel.org> From: Marc Zyngier To: Frank Li Cc: "jdmason@kudzu.us" , "tglx@linutronix.de" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kw@linux.com" , "bhelgaas@google.com" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-pci@vger.kernel.org" , Peng Fan , Aisheng Dong , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "kishon@ti.com" , "lorenzo.pieralisi@arm.com" , "ntb@lists.linux.dev" Subject: Re: [EXT] Re: [PATCH v3 2/4] irqchip: imx mu worked as msi controller In-Reply-To: References: <20220720213036.1738628-1-Frank.Li@nxp.com> <20220720213036.1738628-3-Frank.Li@nxp.com> <874jza525l.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: frank.li@nxp.com, jdmason@kudzu.us, tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kw@linux.com, bhelgaas@google.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, peng.fan@nxp.com, aisheng.dong@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, ntb@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, 21 Jul 2022 16:22:08 +0100, Frank Li wrote: > > > > + pos = find_first_zero_bit(&msi_data->used, IMX_MU_CHANS); > > > + if (pos < IMX_MU_CHANS) > > > + __set_bit(pos, &msi_data->used); > > > + else > > > + err = -ENOSPC; > > > + spin_unlock(&msi_data->lock); > > > + > > > + if (err) > > > + return err; > > > + > > > + err = iommu_dma_prepare_msi(info->desc, msi_data->msiir_addr + > > pos * 4); > > > > Does this HW even have an IOMMU? > > [Frank Li] we have a platform with iommu. I really wonder whether you are taking me for a ride, or whether you are completely misunderstanding what this IOMMU business is about. This is a *CPU* writing to the device to generate an MSI. CPU transactions cannot be translated by an IOMMU as they are not (surprise!) IO devices. They are in control of their own translation, contrary to devices that generate MSIs. So what sort of translation do you expect this to setup? What StreamID is getting used by the DMA framework? There is no answer to these questions because they don't make any sense. None of it makes any sense. At best, you are simply copy-pasting things from various drivers without understanding what they are all about. I suggest you stop doing that and make use of your time working out the problem rather than wasting the reviewers'. M. -- Without deviation from the norm, progress is not possible.