Re: [PATCH v2 1/3] dt-bindings: mtd: spi-nand: Add enable-randomizer-otp property

[Miquel Raynal <miquel.raynal@bootlin.com>]

Hello Cheng Ming,

On 10/09/2025 at 11:02:59 +08, Cheng Ming Lin <linchengming884@gmail.com> wrote:

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> Add a new boolean property "enable-randomizer-otp" to enable the
> randomizer feature on supported SPI-NAND devices.
>
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> ---
>  Documentation/devicetree/bindings/mtd/spi-nand.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/spi-nand.yaml b/Documentation/devicetree/bindings/mtd/spi-nand.yaml
> index 77a8727c7..432bc79e9 100644
> --- a/Documentation/devicetree/bindings/mtd/spi-nand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/spi-nand.yaml
> @@ -21,6 +21,10 @@ properties:
>      description: Encode the chip-select line on the SPI bus
>      maxItems: 1
>  
> +  enable-randomizer-otp:

This is a NAND wide feature, so we should probably add a prefix, such as
"nand,".

Now, what about this "otp" suffix? Many (if not all) chips have a
volatile setting for that. About the naming, "otp" often reflects to the
OTP area, which is not what you imply here, as you want to insist
(rightfully) on the fact that this feature cannot be disabled.

Also, this is a per-chip configuration, while I would have welcomed a
per-partition configuration. I can easily imagine two cases:

- The boot ROM, for longevity purposes, expects the first blocks
  containing the bootloader to be scrambled. However the rest of the
  system does not really care and disables randomization.

- The boot ROM is not capable of de-scrambling, however the rest of the
  system relies on the (probably) more robust scrambling feature.

In both cases a chip wide variable is not relevant.

The fact that it is a one-time feature makes it even harder to fit into
something generic.

How do you think these constraints could fit with your needs? Can you
please explain again (sorry for the repetition) what Macronix chips have
the volatile capability and which ones do not?

Thanks,
Miquèl