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* [PATCH] arm64: dts: marvell: AC5/AC5X: Fix address for UART1
@ 2022-12-15  2:54 Chris Packham
  2023-01-10  3:34 ` Chris Packham
  0 siblings, 1 reply; 3+ messages in thread
From: Chris Packham @ 2022-12-15  2:54 UTC (permalink / raw)
  To: gregory.clement, robh+dt, krzysztof.kozlowski+dt, pierre.gondois,
	vadym.kochan
  Cc: devicetree, linux-kernel, Chris Packham

The correct address offset is 0x12100.

Fixes: 31be791e26cf ("arm64: dts: marvell: Add UART1-3 for AC5/AC5X")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
Not sure how this happened. I only noticed when I had a conflict in some
local patches I was rebasing against upstream. So I obviously had it
right at one point but then managed to break it in the process of
cleaning things up for submission.

 arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
index 7308f7b6b22c..8bce64069138 100644
--- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
@@ -98,7 +98,7 @@ uart0: serial@12000 {
 
 			uart1: serial@12100 {
 				compatible = "snps,dw-apb-uart";
-				reg = <0x11000 0x100>;
+				reg = <0x12100 0x100>;
 				reg-shift = <2>;
 				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 				reg-io-width = <1>;
-- 
2.38.2


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2022-12-15  2:54 [PATCH] arm64: dts: marvell: AC5/AC5X: Fix address for UART1 Chris Packham
2023-01-10  3:34 ` Chris Packham
2023-01-10  9:29   ` Gregory CLEMENT

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