From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Matthew Gerlach <matthew.gerlach@altera.com>,
kernel@pengutronix.de, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 06/10] arm64: dts: socfpga: agilex5: add dwxgmac compatible
Date: Fri, 24 Oct 2025 14:20:09 +0200 [thread overview]
Message-ID: <87zf9g7apy.fsf@pengutronix.de> (raw)
In-Reply-To: <b486bb52-7e95-44d3-ac65-1c28d4d0e40e@kernel.org> (Dinh Nguyen's message of "Fri, 24 Oct 2025 07:00:36 -0500")
Hi Dinh,
On 2025-10-24 at 07:00 -05, Dinh Nguyen <dinguyen@kernel.org> wrote:
> Hi Steffen,
>
> On 10/24/25 06:49, Steffen Trumtrar wrote:
> > The gmac0/1/2 are also compatible to the more generic "snps,dwxgmac"
> > compatible. The platform code checks this to decide if it is a GMAC or
> > GMAC4 compatible IP core.
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> > arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 ++++++---
> > 1 file changed, 6 insertions(+), 3 deletions(-)
> > diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > index 4ccfebfd9d322..d0c139f03541e 100644
> > --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > @@ -536,7 +536,8 @@ qspi: spi@108d2000 {
> > gmac0: ethernet@10810000 {
> > compatible = "altr,socfpga-stmmac-agilex5",
> > - "snps,dwxgmac-2.10";
> > + "snps,dwxgmac-2.10",
> > + "snps,dwxgmac";
> > reg = <0x10810000 0x3500>;
> > interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> > interrupt-names = "macirq";
> > @@ -649,7 +650,8 @@ queue7 {
> > gmac1: ethernet@10820000 {
> > compatible = "altr,socfpga-stmmac-agilex5",
> > - "snps,dwxgmac-2.10";
> > + "snps,dwxgmac-2.10",
> > + "snps,dwxgmac";
> > reg = <0x10820000 0x3500>;
> > interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
> > interrupt-names = "macirq";
> > @@ -762,7 +764,8 @@ queue7 {
> > gmac2: ethernet@10830000 {
> > compatible = "altr,socfpga-stmmac-agilex5",
> > - "snps,dwxgmac-2.10";
> > + "snps,dwxgmac-2.10",
> > + "snps,dwxgmac";
> > reg = <0x10830000 0x3500>;
> > interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> > interrupt-names = "macirq";
> >
>
> I just sent a patch for this yesterday:
>
> https://lore.kernel.org/all/20251023214012.283600-1-dinguyen@kernel.org/
>
ah, I missed that, than this patch is unneccessary.
> I'll make sure to include you on future submissions.
>
> I didn't add it to the bindings document though.
>
As I always get complains from dt-check bot, I remembered to add it ;)
Best regards,
Steffen
--
Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21 | https://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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next prev parent reply other threads:[~2025-10-24 12:20 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-24 11:49 [PATCH v5 00/10] arm64: dts: socfpga: agilex5: enable network and add new board Steffen Trumtrar
2025-10-24 11:49 ` [PATCH v5 01/10] net: stmmac: dwmac-socfpga: don't set has_gmac Steffen Trumtrar
2025-10-24 12:11 ` Maxime Chevallier
2025-10-24 12:30 ` Steffen Trumtrar
2025-10-29 8:11 ` G Thomas, Rohan
2025-10-25 18:55 ` Russell King (Oracle)
2025-10-24 11:49 ` [PATCH v5 02/10] net: stmmac: Use interrupt mode INTM=1 for per channel irq Steffen Trumtrar
2025-10-24 12:21 ` Maxime Chevallier
2025-10-24 17:00 ` Simon Horman
2025-10-25 19:01 ` Russell King (Oracle)
2025-10-24 11:49 ` [PATCH v5 03/10] arm64: dts: socfpga: agilex5: Add SMMU node Steffen Trumtrar
2025-10-24 11:49 ` [PATCH v5 04/10] arm64: dts: socfpga: agilex5: smmu enablement Steffen Trumtrar
2025-10-24 12:05 ` Dinh Nguyen
2025-10-24 16:57 ` Simon Horman
2025-10-24 11:49 ` [PATCH v5 05/10] dt-bindings: net: altr,socfpga-stmmac: add generic dwxgmac compatible Steffen Trumtrar
2025-10-26 8:53 ` Krzysztof Kozlowski
2025-10-24 11:49 ` [PATCH v5 06/10] arm64: dts: socfpga: agilex5: add " Steffen Trumtrar
2025-10-24 12:00 ` Dinh Nguyen
2025-10-24 12:20 ` Steffen Trumtrar [this message]
2025-10-24 11:49 ` [PATCH v5 07/10] dt-bindings: net: altr,socfpga-stmmac: allow dma-coherent property Steffen Trumtrar
2025-10-26 8:50 ` Krzysztof Kozlowski
2025-10-24 11:50 ` [PATCH v5 08/10] arm64: dts: socfpga: agilex5: dma coherent enablement for XGMACs Steffen Trumtrar
2025-10-24 11:50 ` [PATCH v5 09/10] dt-bindings: intel: add agilex5-based Arrow AXE5-Eagle Steffen Trumtrar
2025-10-24 11:50 ` [PATCH v5 10/10] arm64: dts: socfpga: agilex5: initial support for " Steffen Trumtrar
2025-10-25 0:07 ` [PATCH v5 00/10] arm64: dts: socfpga: agilex5: enable network and add new board Jakub Kicinski
2025-10-25 18:52 ` Russell King (Oracle)
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