From: Thomas Gleixner <tglx@linutronix.de>
To: Lucas Zampieri <lzampier@redhat.com>, linux-kernel@vger.kernel.org
Cc: Lucas Zampieri <lzampier@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Samuel Holland <samuel.holland@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Vivian Wang <dramforever@live.com>,
Charles Mirabile <cmirabil@redhat.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 0/4] Add UltraRISC DP1000 PLIC support
Date: Thu, 23 Oct 2025 21:29:44 +0200 [thread overview]
Message-ID: <87zf9hwh5j.ffs@tglx> (raw)
In-Reply-To: <20251023140057.204439-1-lzampier@redhat.com>
On Thu, Oct 23 2025 at 15:00, Lucas Zampieri wrote:
> This series adds support for the PLIC implementation in the UltraRISC
> DP1000 SoC. The UR-CP100 cores used in the DP1000 have a hardware bug in
> their PLIC claim register where reading it while multiple interrupts are
> pending can return the wrong interrupt ID. The workaround temporarily
> disables all interrupts except the first pending one before reading the
> claim register, then restores the previous state.
>
> The driver matches on "ultrarisc,cp100-plic" (CPU core compatible), allowing
> the quirk to apply to all SoCs using UR-CP100 cores (currently DP1000,
> potentially future SoCs).
>
> Charles Mirabile (3):
> dt-bindings: interrupt-controller: add UltraRISC DP1000 PLIC
> irqchip/plic: enable optimization of interrupt enable state
That one never showed up. Neither in my inbox nor on lore
next prev parent reply other threads:[~2025-10-23 19:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-23 14:00 [PATCH v6 0/4] Add UltraRISC DP1000 PLIC support Lucas Zampieri
2025-10-23 14:00 ` [PATCH v6 1/3] dt-bindings: vendor-prefixes: add UltraRISC Lucas Zampieri
2025-10-23 14:00 ` [PATCH v6 2/3] dt-bindings: interrupt-controller: add UltraRISC DP1000 PLIC Lucas Zampieri
2025-10-23 14:00 ` [PATCH v6 4/4] irqchip/plic: add support for " Lucas Zampieri
2025-10-23 19:29 ` Thomas Gleixner [this message]
2025-10-23 20:17 ` [PATCH v6 0/4] Add UltraRISC DP1000 PLIC support Charles Mirabile
2025-10-24 8:34 ` Lucas Zampieri
-- strict thread matches above, loose matches on Subject: below --
2025-10-24 8:36 Lucas Zampieri
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87zf9hwh5j.ffs@tglx \
--to=tglx@linutronix.de \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=cmirabil@redhat.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dramforever@live.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=lzampier@redhat.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
--cc=samuel.holland@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox