From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-103.mailbox.org (mout-p-103.mailbox.org [80.241.56.161]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F5D627FD4B; Wed, 15 Oct 2025 14:33:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.161 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760538812; cv=none; b=i5QKCWoylf8EDQRSqtsRPNyhlGsqNXhHrN5AJResy1a3XJZr5iXc2iNZr30eMZjnh1EtFOu1tp1iG1EYHMsFuYGtRDtQeHS3RGFOytA+k+p15xRp03fB9+9htlUkgg/R0NJ1HT90rKjwEuJYfX2jLumb1wbGt5ekCzxW5NVnlCA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760538812; c=relaxed/simple; bh=TyCgYVyA0qBWnBrmbbRe+PePLx8LUExSXhsoiurofBs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=W5qdCr5FuYGDuPezv7ZdRaz1ZHsq+o4CrqPjEJSEzrrNYWmNm86yp8qOWIWe1JqzdSiUMShfiBfy0oXoh9pGBVpMxt+xsGf52GA7a++XD+JDkB0Y7Wf88MtQQjoURYlKiTe+uzhjdyIHBtbmyfc2wtrVk8ujGfR49SyG0M+OfmI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=LthLcyfE; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=DC1Mgh6k; arc=none smtp.client-ip=80.241.56.161 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="LthLcyfE"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="DC1Mgh6k" Received: from smtp202.mailbox.org (smtp202.mailbox.org [10.196.197.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-103.mailbox.org (Postfix) with ESMTPS id 4cmtqY0gMtz9tg3; Wed, 15 Oct 2025 16:33:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760538809; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q/cjSZfGXkfMX/oq1yvyojc5xqlL+Ltp0AG5OjB5oXA=; b=LthLcyfElyxrh4OtE/QaH42IDBlASpFRp34dmblnqS6N6+owvi+AGpLnnw3KCg7WNVlcPS KWe90qCvVVeqotrQv4iseL6lTeG130sJDlTGg8X+pxV4jkLSB5YHUpdr82Yap7LnDuoI2o CDpntdFSRYmrQ3yYGNdWjHtrUaUQgUdfBMGy1B3gAMmNqR/VpaOIlCPqBXVO5E3HGfhsFq OU8l2JjKybnt7bs5r1M+TwrH8JScxN8vaefudtQnxD3iOm1riqgfzSL2952UavuJlicPEc jrwyTWrpihhwMbXHFwKJagBoDNs7GKFJajQE65FpwkLZwQ7f9XqzjkJ8Ey316A== Message-ID: <8809b170-9cea-466a-8f73-29ff560c92da@mailbox.org> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1760538807; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q/cjSZfGXkfMX/oq1yvyojc5xqlL+Ltp0AG5OjB5oXA=; b=DC1Mgh6k6xBxK1WRjL20A9FKI4waL0OXlyTdp8kRpVzBt5DtmT/53chovN0EQX/gf4Dr6S jYClvxnNmkzTxQ9NBBBVy4xwJQm3LGf7u6aYk1TvtlXzxMPW1UAfJijHyqCHlY07UNQ22J cPX6w1vl9TEO1C1BCPBwERAL/rM6R+tba7Sr/RNcuQHOUdAz0RFHqto2G2ZC6pqMBz3L4x kdb7QlWz6oKfisc+13bORkTkOYwt3serJaxkj3DWZcb4c//ZUI+WLfdruzrP5xIQ0+8eZn zAWdnHiQDHzjBTcGDGxTtKGipqgts9c9LtguySLScyQN49gk52CmHOJq0VXPdA== Date: Wed, 15 Oct 2025 16:24:44 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+ To: Matt Coster , Geert Uytterhoeven Cc: Marek Vasut , Adam Ford , Conor Dooley , David Airlie , Frank Binns , Alessio Belle , Alexandru Dadu , Geert Uytterhoeven , Krzysztof Kozlowski , Kuninori Morimoto , Maarten Lankhorst , Magnus Damm , Maxime Ripard , Rob Herring , Simona Vetter , Thomas Zimmermann , "devicetree@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "linux-arm-kernel@lists.infradead.org" , "linux-renesas-soc@vger.kernel.org" References: <20251013190210.142436-1-marek.vasut+renesas@mailbox.org> Content-Language: en-US From: Marek Vasut In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-MBO-RS-META: 7ttxq4j69pdefxjn89h4ju6n166yx5t5 X-MBO-RS-ID: 5fcd48714613e0e4852 On 10/15/25 12:52 PM, Matt Coster wrote: Hello Matt, >>>> - Clock ZGφ: Appears to be a core clock for the GPU (3DGE). That would >>>> make it our "core" clock. >>> >>> This should be 600-700 MHz clock on M3-W , so that sounds like a GPU >>> core clock. >> >> Agreed. >> >>> >>>> - Clock S2D1φ: Appears to be a core clock used on the AXI bus, making >>>> it our "sys" clock. >>> >>> This should be 400 MHz AXI clock, but wouldn't that make it "mem" clock >>> ? I think this might be the clock which drives the AXI bus, used by the >>> GPU to access data in DRAM ? >> >> Agreed. >> >>>> - MSTP ST112: Appears to be a whole module on/off control of some >>>> description, and definitely doesn't align with the missing "mem" >>>> clock. >>> >>> Maybe this is the "sys" clock, since it toggles the register interface >>> clock on/off ? >> >> Probably. > > Yes, this is probably correct. I got my AXI interfaces mixed up – we > have both a manager interface for accessing memory (using the mem clock) > and a subordinate interface to expose to our registers (using the sys > clock). Here's the summary table from our system integration document: > > +-------+-------------------------+------------------------+ > | Clock | Modules Clocked | Dependencies | > +-------+-------------------------+------------------------+ > | mem | SLC / AXI Manager | Run for all operations | > | sys | SOCIF / AXI Subordinate | Run for all operations | > | core | All | Run for all operations | > +-------+-------------------------+------------------------+ Thank you for sharing that. I will send a V2 series shortly. -- Best regards, Marek Vasut