From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B76BC10DAA for ; Thu, 3 Sep 2020 21:50:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 24A9820639 for ; Thu, 3 Sep 2020 21:50:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PFY/FTQS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729390AbgICVuO (ORCPT ); Thu, 3 Sep 2020 17:50:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729312AbgICVuM (ORCPT ); Thu, 3 Sep 2020 17:50:12 -0400 Received: from mail-pj1-x1044.google.com (mail-pj1-x1044.google.com [IPv6:2607:f8b0:4864:20::1044]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE978C061244; Thu, 3 Sep 2020 14:50:07 -0700 (PDT) Received: by mail-pj1-x1044.google.com with SMTP id gf14so2095832pjb.5; Thu, 03 Sep 2020 14:50:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=r7Tgg9fh7R0oiGADlmNoq8hG+/+fXAk6S6qW0ozfjnY=; b=PFY/FTQSv4gn1ON7S+i7H5hdVNh34mvVfIbqZaJD4ekQof7nXBISRDQHHRDHmJ9gL7 6LNnUzyaaG78Tw4DBGfFjBDH0Pzj3X3Ho6DPtQQsOg+LUINBF+gAKxkBGyNQ5i+FTqSs BGKtsDS0zLYBHqQAZdo7BNF3nDvwabTdvIzpc9qF++kk7rizN/2TYS6d8Z2vCqrECw5x E8uebwVgh7njY0Eqc/B/1A/tDexpikI2lqPZK28Y5Gm9jkqikz1Q/x/isNnrKprI84Uw uwFGR/HtjptWpCKJyX/oGr1UDxiwEDP+hPgFZpypwvvQwAlON1mmCmBIdHHUxK9f96FQ L/Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=r7Tgg9fh7R0oiGADlmNoq8hG+/+fXAk6S6qW0ozfjnY=; b=K3qzJnWKqD9STnW6DVE3woA+e429Jsvv3OSvC2KDsjqLumdJaGYt8iGhUt2DoPYLcH D3aW+pTEnUmo0sW8L4gcBPW86JZajODMNcE1WEwVtd2OsLlRtjRoD0HXSogRzedFV5ZQ vMqHA6LRVEnzwPodqzysDOJZJS7fzGInhKk7W+vtfxrwQMN/vizLcuab/voms+VE1xWb k9g1y56z9vaDHfGVD0uGfq3qgBjZGrMx0km0RV+RCfpAs6Fxevf8R/3NjqImij3rtlo1 Nl4d4Dpw3mMs2XeG0wxpQSikKlBVdsVExxGUqhGDJZc70MLLboHHrESOvAywD9JFjBzv GgGg== X-Gm-Message-State: AOAM531QjdCTgCAyW3UJTyH2ljDkqPZ0gdeZQpZfD4pyqC7ifQ5I+niR KnysAWMzizCTKjn7qFWePvM= X-Google-Smtp-Source: ABdhPJwBNIZpP8HG3Au66qMjwtVggOKD6S/kSnpzZXyj19Qm7Gvanr8kpUr712HT2GiNdHee6SYz2w== X-Received: by 2002:a17:90a:1fca:: with SMTP id z10mr5060502pjz.209.1599169807406; Thu, 03 Sep 2020 14:50:07 -0700 (PDT) Received: from [10.230.30.107] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id t63sm3478502pgt.50.2020.09.03.14.50.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 03 Sep 2020 14:50:06 -0700 (PDT) Subject: Re: [PATCH net-next 1/3] net: phy: Support enabling clocks prior to bus probe To: Andrew Lunn , Rob Herring Cc: netdev , adam.rudzinski@arf.net.pl, Marco Felsch , Heiner Kallweit , Richard Leitner , Dejin Zheng , devicetree@vger.kernel.org, Sascha Hauer , Jakub Kicinski References: <20200903043947.3272453-1-f.fainelli@gmail.com> <20200903043947.3272453-2-f.fainelli@gmail.com> <20200903214238.GF3112546@lunn.ch> From: Florian Fainelli Message-ID: <885abb40-cf1c-b464-bf09-08c7235410ef@gmail.com> Date: Thu, 3 Sep 2020 14:50:05 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Firefox/78.0 Thunderbird/78.1.1 MIME-Version: 1.0 In-Reply-To: <20200903214238.GF3112546@lunn.ch> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 9/3/2020 2:42 PM, Andrew Lunn wrote: > On Thu, Sep 03, 2020 at 03:28:22PM -0600, Rob Herring wrote: >> What if a device requires clocks enabled in a certain order or timing? >> It's not just clocks, you could have some GPIOs or a regulator that >> need enabling first. It's device specific, so really needs a per >> device solution. This is not just an issue with MDIO. I think we >> really need some sort of pre-probe hook in the driver model in order >> to do any non-discoverable init for discoverable buses. > > Hi Rob > > How do you solve the chicken/egg of knowing what device specific init > is needed before you can discover what device you have on the bus? For MDIO since we have a fixed number of devices on the bus, we could pre-populate the MDIO map for all addresses, and free up the devices that we did not probe. When using DT we can first parse the address, create a mdio_device there, and then turn on clocks/regulators/GPIOs whatever since we now have a device reference. Only then do we bind the device with its driver. If we are using the DT scanning loop because the node did not provide a "reg" property, then the PHY must be in a functional state to be probed, we cannot guess what we do not know. All of this uses MDIO implementation knowledge though. > >> Or perhaps forcing probe when there are devices defined in DT if >> they're not discovered by normal means. > > The PHY subsystem has this. You came specify in DT the ID of the > device which we would normally read during bus discovery. The correct > driver is then loaded and probed. But it is good practice to avoid > this. OEMs are known to change the PHY in order to perform cost > optimisation. So we prefer to do discover and do the right thing if > the PHY has changed. > > As for GPIOS and regulators, i expect this code will expand pretty > soon after being merged to handle those. There are users wanting > it. We already have some standard properties defined, in terms of > gpios, delay while off, delay after turning it on. As for ordering, i > guess it would make sense to enable the clocks and then hit it with a > reset? If there is a device which cannot be handled like this, it can > always hard code its ID in device tree, and fully control its > resources in the driver. > > Andrew > -- Florian