[PATCH v3 03/10] spmi: add generic SPMI controller binding documentation

[PATCH v3 03/10] spmi: add generic SPMI controller binding documentation

[Josh Cartwright]

Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
---
 Documentation/devicetree/bindings/spmi/spmi.txt | 41 +++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spmi/spmi.txt

diff --git a/Documentation/devicetree/bindings/spmi/spmi.txt b/Documentation/devicetree/bindings/spmi/spmi.txt
new file mode 100644
index 0000000..32a180d
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/spmi.txt
@@ -0,0 +1,41 @@
+System Power Management Interface (SPMI) Controller
+
+This document defines a generic set of bindings for use by SPMI controllers.  A
+controller is modelled in device tree as a node with zero or more child nodes,
+each representing a unique slave on the bus.
+
+Required properties:
+- #address-cells : must be set to 2
+- #size-cells : must be set to 0
+
+Child nodes:
+
+An SPMI controller node can contain zero or more child nodes representing slave
+devices on the bus.  Child 'reg' properties are specified as an address, type
+pair.  The address must be in the range 0-15 (4 bits).  The type must be one of
+SPMI_USID or SPMI_GSID (1) for Unique Slave ID or Group Slave ID respectively.
+These are the identifiers "statically assigned by the system integrator", as
+per the SPMI spec.
+
+Each child node must have one and only one 'reg' entry of type SPMI_USID.
+
+#include <dt-bindings/spmi/spmi.h>
+
+	controller@.. {
+		compatible = "...";
+		reg = <...>;
+
+		#address-cells = <2>;
+		#size-cells <0>;
+
+		child@0 {
+			compatible = "...";
+			reg = <0 SPMI_USID>;
+		};
+
+		child@7 {
+			compatible = "...";
+			reg = <7 SPMI_USID
+			       3 SPMI_GSID>;
+		};
+	};
-- 
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[PATCH v3 01/10] of: Add empty for_each_available_child_of_node() macro definition

[Josh Cartwright]

From: Sylwester Nawrocki <s.nawrocki@samsung.com>

Add this empty macro definition so users can be compiled without
excluding this macro call with preprocessor directives when CONFIG_OF
is disabled.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 include/linux/of.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/linux/of.h b/include/linux/of.h
index f95aee3..908584e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -364,6 +364,9 @@ static inline bool of_have_populated_dt(void)
 #define for_each_child_of_node(parent, child) \
 	while (0)
 
+#define for_each_available_child_of_node(parent, child) \
+	while (0)
+
 static inline struct device_node *of_get_child_by_name(
 					const struct device_node *node,
 					const char *name)
-- 
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hosted by The Linux Foundation

Re: [PATCH v3 01/10] of: Add empty for_each_available_child_of_node() macro definition

[Rob Herring]

On Mon, Oct 28, 2013 at 1:12 PM, Josh Cartwright <joshc@codeaurora.org> wrote:
> From: Sylwester Nawrocki <s.nawrocki@samsung.com>
>
> Add this empty macro definition so users can be compiled without
> excluding this macro call with preprocessor directives when CONFIG_OF
> is disabled.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

I'm assuming the rest of this is not going to make 3.13, so I've
applied this for 3.13.

Rob

[PATCH v3 09/10] mfd: pm8x41: document device tree bindings

[Josh Cartwright]

Document the bindings used to describe the Qualcomm 8x41 PMICs.

Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
---
 Documentation/devicetree/bindings/mfd/pm8x41.txt | 33 ++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/pm8x41.txt

diff --git a/Documentation/devicetree/bindings/mfd/pm8x41.txt b/Documentation/devicetree/bindings/mfd/pm8x41.txt
new file mode 100644
index 0000000..6afd4ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/pm8x41.txt
@@ -0,0 +1,33 @@
+Qualcomm PM8841 and PM8941 PMIC multi-function devices
+
+The PM8x41 PMICs are used with the Qualcomm Snapdragon 800 series SoCs, and are
+interfaced to the chip via the SPMI (System Power Management Interface) bus.
+Support for  multiple independent functions are implemented by splitting the
+16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
+each.  A function can consume one or more of these fixed-size register regions.
+
+Required properties:
+- compatible: Must be one of:
+     "qcom,pm8841"
+     "qcom,pm8941"
+- reg: Specifies the SPMI USID slave address for this device
+- #address-cells = <1>
+- #size-cells = <0>
+
+Each child node represents a function of the PM8x41.  Each child 'reg' entry
+describes an offset within the USID slave address where the region starts.
+
+Example:
+
+pm8941@0 {
+	compatible = "qcom,pm8941";
+	reg = <0x0>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	rtc {
+		compatible = "qcom,pm8941-rtc";
+		reg = <0x6000 0x6100>;
+	};
+}
-- 
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hosted by The Linux Foundation

Re: [PATCH v3 09/10] mfd: pm8x41: document device tree bindings

[Ivan T. Ivanov]

Hi Josh,

On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote: 
> Document the bindings used to describe the Qualcomm 8x41 PMICs.
> 
> Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/mfd/pm8x41.txt | 33 ++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/pm8x41.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/pm8x41.txt b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> new file mode 100644
> index 0000000..6afd4ce
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> @@ -0,0 +1,33 @@
> +Qualcomm PM8841 and PM8941 PMIC multi-function devices
> +
> +The PM8x41 PMICs are used with the Qualcomm Snapdragon 800 series SoCs, and are
> +interfaced to the chip via the SPMI (System Power Management Interface) bus.
> +Support for  multiple independent functions are implemented by splitting the
> +16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
> +each.  A function can consume one or more of these fixed-size register regions.
> +
> +Required properties:
> +- compatible: Must be one of:
> +     "qcom,pm8841"
> +     "qcom,pm8941"
> +- reg: Specifies the SPMI USID slave address for this device
> +- #address-cells = <1>
> +- #size-cells = <0>
> +
> +Each child node represents a function of the PM8x41.  Each child 'reg' entry
> +describes an offset within the USID slave address where the region starts.
> +
> +Example:
> +
> +pm8941@0 {
> +	compatible = "qcom,pm8941";
> +	reg = <0x0>;
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	rtc {
> +		compatible = "qcom,pm8941-rtc";
> +		reg = <0x6000 0x6100>;

This doesn't look right. Probably #size-cells have to be <1>?

Regards,
Ivan


> +	};
> +}

Re: [PATCH v3 09/10] mfd: pm8x41: document device tree bindings

[Josh Cartwright]

On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
> On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote: 
> > Document the bindings used to describe the Qualcomm 8x41 PMICs.
> > 
> > Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> > ---
> >  Documentation/devicetree/bindings/mfd/pm8x41.txt | 33 ++++++++++++++++++++++++
> >  1 file changed, 33 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mfd/pm8x41.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/mfd/pm8x41.txt b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> > new file mode 100644
> > index 0000000..6afd4ce
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> > @@ -0,0 +1,33 @@
> > +Qualcomm PM8841 and PM8941 PMIC multi-function devices
> > +
> > +The PM8x41 PMICs are used with the Qualcomm Snapdragon 800 series SoCs, and are
> > +interfaced to the chip via the SPMI (System Power Management Interface) bus.
> > +Support for  multiple independent functions are implemented by splitting the
> > +16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
> > +each.  A function can consume one or more of these fixed-size register regions.
> > +
> > +Required properties:
> > +- compatible: Must be one of:
> > +     "qcom,pm8841"
> > +     "qcom,pm8941"
> > +- reg: Specifies the SPMI USID slave address for this device
> > +- #address-cells = <1>
> > +- #size-cells = <0>
> > +
> > +Each child node represents a function of the PM8x41.  Each child 'reg' entry
> > +describes an offset within the USID slave address where the region starts.
> > +
> > +Example:
> > +
> > +pm8941@0 {
> > +	compatible = "qcom,pm8941";
> > +	reg = <0x0>;
> > +
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +
> > +	rtc {
> > +		compatible = "qcom,pm8941-rtc";
> > +		reg = <0x6000 0x6100>;
> 
> This doesn't look right. Probably #size-cells have to be <1>?

Some functions of the PMIC actually consume more than one fixed-size
region of the slave address space.  This example is showing one such
peripheral (consuming the region starting at 0x6000 and another at
0x6100).

-- 
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hosted by The Linux Foundation

Re: [PATCH v3 09/10] mfd: pm8x41: document device tree bindings

[Ivan T. Ivanov]

Hi,

On Tue, 2013-10-29 at 10:05 -0500, Josh Cartwright wrote: 
> On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
> > On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote: 
> > > Document the bindings used to describe the Qualcomm 8x41 PMICs.
> > > 
> > > Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> > > ---
> > >  Documentation/devicetree/bindings/mfd/pm8x41.txt | 33 ++++++++++++++++++++++++
> > >  1 file changed, 33 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/mfd/pm8x41.txt
> > > 
> > > diff --git a/Documentation/devicetree/bindings/mfd/pm8x41.txt b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> > > new file mode 100644
> > > index 0000000..6afd4ce
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/mfd/pm8x41.txt
> > > @@ -0,0 +1,33 @@
> > > +Qualcomm PM8841 and PM8941 PMIC multi-function devices
> > > +
> > > +The PM8x41 PMICs are used with the Qualcomm Snapdragon 800 series SoCs, and are
> > > +interfaced to the chip via the SPMI (System Power Management Interface) bus.
> > > +Support for  multiple independent functions are implemented by splitting the
> > > +16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
> > > +each.  A function can consume one or more of these fixed-size register regions.
> > > +
> > > +Required properties:
> > > +- compatible: Must be one of:
> > > +     "qcom,pm8841"
> > > +     "qcom,pm8941"
> > > +- reg: Specifies the SPMI USID slave address for this device
> > > +- #address-cells = <1>
> > > +- #size-cells = <0>
> > > +
> > > +Each child node represents a function of the PM8x41.  Each child 'reg' entry
> > > +describes an offset within the USID slave address where the region starts.
> > > +
> > > +Example:
> > > +
> > > +pm8941@0 {
> > > +	compatible = "qcom,pm8941";
> > > +	reg = <0x0>;
> > > +
> > > +	#address-cells = <1>;
> > > +	#size-cells = <0>;
> > > +
> > > +	rtc {
> > > +		compatible = "qcom,pm8941-rtc";
> > > +		reg = <0x6000 0x6100>;
> > 
> > This doesn't look right. Probably #size-cells have to be <1>?
> 
> Some functions of the PMIC actually consume more than one fixed-size
> region of the slave address space.  This example is showing one such
> peripheral (consuming the region starting at 0x6000 and another at
> 0x6100).
> 

Ok. Thanks for clarification.

Regards,
Ivan

[PATCH v3 06/10] spmi: document the PMIC arbiter SPMI bindings

[Josh Cartwright]

Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
---
 .../bindings/spmi/qcom,spmi-pmic-arb.txt           | 42 ++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt

diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
new file mode 100644
index 0000000..68949aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
@@ -0,0 +1,42 @@
+Qualcomm SPMI Controller (PMIC Arbiter)
+
+The SPMI PMIC Arbiter is found on the Snapdragon 800 Series.  It is an SPMI
+controller with wrapping arbitration logic to allow for multiple on-chip
+devices to control a single SPMI master.
+
+The PMIC Arbiter can also act as an interrupt controller, providing interrupts
+to slave devices.
+
+See spmi.txt for the generic SPMI controller binding requirements for child
+nodes.
+
+Required properties:
+- compatible : should be "qcom,spmi-pmic-arb".
+- reg-names  : should be "core", "intr", "cnfg"
+- reg : offset and length of the PMIC Arbiter Core register map.
+- reg : offset and length of the PMIC Arbiter Interrupt controller register map.
+- reg : offset and length of the PMIC Arbiter Configuration register map.
+- #address-cells : must be set to 1
+- #size-cells : must be set to 0
+- interrupt-controller : indicates the PMIC arbiter is an interrupt controller
+- #interrupt-cells = <4>:  interrupts are specified as a 4-tuple:
+    cell 1: slave ID for the requested interrupt (0-15)
+    cell 2: peripheral ID for requested interrupt (0-255)
+    cell 3: the requested peripheral interrupt (0-7)
+    cell 4: interrupt flags indicating level-sense information, as defined in
+            dt-bindings/interrupt-controller/irq.h
+
+Example:
+
+	qcom,spmi@fc4c0000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg-names = "core", "intr", "cnfg";
+		reg = <0xfc4cf000 0x1000>,
+		      <0Xfc4cb000 0x1000>,
+		      <0Xfc4ca000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		interrupt-controller;
+		#interrupt-cells = <4>;
+	};
-- 
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hosted by The Linux Foundation

Re: [PATCH v3 06/10] spmi: document the PMIC arbiter SPMI bindings

[Ivan T. Ivanov]

Hi Josh,

On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote: 
> Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> ---
>  .../bindings/spmi/qcom,spmi-pmic-arb.txt           | 42 ++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> 
> diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> new file mode 100644
> index 0000000..68949aa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> @@ -0,0 +1,42 @@
> +Qualcomm SPMI Controller (PMIC Arbiter)
> +
> +The SPMI PMIC Arbiter is found on the Snapdragon 800 Series.  It is an SPMI
> +controller with wrapping arbitration logic to allow for multiple on-chip
> +devices to control a single SPMI master.
> +
> +The PMIC Arbiter can also act as an interrupt controller, providing interrupts
> +to slave devices.
> +
> +See spmi.txt for the generic SPMI controller binding requirements for child
> +nodes.
> +
> +Required properties:
> +- compatible : should be "qcom,spmi-pmic-arb".
> +- reg-names  : should be "core", "intr", "cnfg"
> +- reg : offset and length of the PMIC Arbiter Core register map.
> +- reg : offset and length of the PMIC Arbiter Interrupt controller register map.
> +- reg : offset and length of the PMIC Arbiter Configuration register map.
> +- #address-cells : must be set to 1

This doesn't seem to follow generic set of bindings for the SPMI
controllers. #address-cells : must be set to 2.

Regards,
Ivan

> +- #size-cells : must be set to 0
> +- interrupt-controller : indicates the PMIC arbiter is an interrupt controller
> +- #interrupt-cells = <4>:  interrupts are specified as a 4-tuple:
> +    cell 1: slave ID for the requested interrupt (0-15)
> +    cell 2: peripheral ID for requested interrupt (0-255)
> +    cell 3: the requested peripheral interrupt (0-7)
> +    cell 4: interrupt flags indicating level-sense information, as defined in
> +            dt-bindings/interrupt-controller/irq.h
> +
> +Example:
> +
> +	qcom,spmi@fc4c0000 {
> +		compatible = "qcom,spmi-pmic-arb";
> +		reg-names = "core", "intr", "cnfg";
> +		reg = <0xfc4cf000 0x1000>,
> +		      <0Xfc4cb000 0x1000>,
> +		      <0Xfc4ca000 0x1000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		interrupt-controller;
> +		#interrupt-cells = <4>;
> +	};

Re: [PATCH v3 06/10] spmi: document the PMIC arbiter SPMI bindings

[Josh Cartwright]

On Tue, Oct 29, 2013 at 04:08:29PM +0200, Ivan T. Ivanov wrote:
> On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote: 
> > Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> > ---
> >  .../bindings/spmi/qcom,spmi-pmic-arb.txt           | 42 ++++++++++++++++++++++
> >  1 file changed, 42 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> > new file mode 100644
> > index 0000000..68949aa
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
> > @@ -0,0 +1,42 @@
> > +Qualcomm SPMI Controller (PMIC Arbiter)
> > +
> > +The SPMI PMIC Arbiter is found on the Snapdragon 800 Series.  It is an SPMI
> > +controller with wrapping arbitration logic to allow for multiple on-chip
> > +devices to control a single SPMI master.
> > +
> > +The PMIC Arbiter can also act as an interrupt controller, providing interrupts
> > +to slave devices.
> > +
> > +See spmi.txt for the generic SPMI controller binding requirements for child
> > +nodes.
> > +
> > +Required properties:
> > +- compatible : should be "qcom,spmi-pmic-arb".
> > +- reg-names  : should be "core", "intr", "cnfg"
> > +- reg : offset and length of the PMIC Arbiter Core register map.
> > +- reg : offset and length of the PMIC Arbiter Interrupt controller register map.
> > +- reg : offset and length of the PMIC Arbiter Configuration register map.
> > +- #address-cells : must be set to 1
> 
> This doesn't seem to follow generic set of bindings for the SPMI
> controllers. #address-cells : must be set to 2.

Indeed, good catch.  I'll fix it up.

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