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From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: Mark Brown <broonie@kernel.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	lgirdwood@gmail.com, robh+dt@kernel.org, plai@codeaurora.org,
	bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com,
	srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org,
	linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Subject: Re: [PATCH v4 1/2] Partially revert ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state
Date: Mon, 14 Dec 2020 18:13:22 +0530	[thread overview]
Message-ID: <89456f01-aa02-7a7d-a47b-bf1f26e66d4c@codeaurora.org> (raw)
In-Reply-To: <20201201175135.GO5239@sirena.org.uk>

Thanks Mark for Your time!!!

On 12/1/2020 11:21 PM, Mark Brown wrote:
> On Tue, Dec 01, 2020 at 11:01:21PM +0530, Srinivasa Rao Mandadapu wrote:
>> On 11/30/2020 6:16 PM, Mark Brown wrote:
>>> Part of this commit message says that the problem was making the registers
>>> non-volatile but both the change and the rest of the commit message say
>>> that the issue was that the registers were made volatile.  I'm also
>>> still unclear as to what the issue is either way - how does reading the
>>> state of the registers from the hardware instead of the cache affect
>>> things?
>> Initial problem was, during playback if device suspended, I2S and DMA
>> control registers
>> are getting reset and unable to recover playback after resume.
>> As these registers were non volatile registers, driver is not getting actual
>> register value
>> and unable to report error state to application. Due to this application
>> keeps on polling for HW current pointer state and not exited from PCM
>> running state.
>> Later from review comments by Srinivas kandagatla, I got to know
>>
>> about regcache sync APIs, which can be used  to sync cache after resume and
>>
>> HW registers can be updated with  original values. With that playback can be
>> continued.
>>
>> So is the reason, I am reverting partial changes in the commit b1824968221c.
> I don't understand why a fix for the register cache not being in sync
> with the hardware doesn't involve syncing the register cache with the
> hardware.

I am sorry I couldn't understand your point. Could you please elaborate 
your query?

Actually I posted V5 version based on review comments.

-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.


  reply	other threads:[~2020-12-14 12:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-28  4:59 [PATCH v4 0/2] Platform driver update to support playback recover after resume Srinivasa Rao Mandadapu
2020-11-28  4:59 ` [PATCH v4 1/2] Partially revert ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state Srinivasa Rao Mandadapu
2020-11-30 11:09   ` Srinivas Kandagatla
2020-11-30 12:46   ` Mark Brown
2020-12-01 17:31     ` Srinivasa Rao Mandadapu
2020-12-01 17:51       ` Mark Brown
2020-12-14 12:43         ` Srinivasa Rao Mandadapu [this message]
2020-12-14 17:50           ` Mark Brown
2020-12-17  8:14             ` Srinivasa Rao Mandadapu
2020-12-17  8:18             ` Srinivasa Rao Mandadapu
2020-11-28  4:59 ` [PATCH v4 2/2] ASoC: qcom: Add support for playback recover after resume Srinivasa Rao Mandadapu
2020-11-30 11:19   ` Srinivas Kandagatla
2020-11-30 16:26   ` Steev Klimaszewski

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