From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-170.mta1.migadu.com (out-170.mta1.migadu.com [95.215.58.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E09E386450 for ; Wed, 1 Jul 2026 21:47:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.170 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782942463; cv=none; b=Irqz/Sf+i2C8tU015GctSIkCY/bB3TDGXEI9qgGAzcA0Dnn2Sxlbsvk8SV3XxeVnlUIBZ0euDzev9ncJln+x9THDES1ggCPRR3dlMg28TNgt6Enm5HUoMUKwKUMk1+EagMcKvtaHqJJtUqzgXp2lVmmc2PLOptvy+zoilb5i2Zs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782942463; c=relaxed/simple; bh=U1MHLwzs2hVH2Bl+EC1aDM8E/bTMCVplBdWelSXv1rA=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=jb7aXxAfCEf9iOXjce2Co2U5PEGeIrkHF2VHDkw7EoZ0CNuGR35j+BRrks5iNiqpMsWi9NVUTcpWMU4aoc3dOAV014FmHTT9X3Rui9ko8qz+Abc3WpfRDQz1LfL+ZjQo4KAIbGjayvz1y+i77yFu7Ry7SQurth97MLl54Gv/Lgg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=rzoGVCf9; arc=none smtp.client-ip=95.215.58.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="rzoGVCf9" Message-ID: <89720193-e8ad-4bb3-b6d2-3253413b18ab@linux.dev> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782942450; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zfnpZAPYTjU1y1/bwelr25Tajv7sMv4wyV/Tmx+tLN8=; b=rzoGVCf9Acoz9pVzpj75/n7UWOFKgNHVycrnsStv71NID/Qz5Ub0cTx3lcOw5vNVod2J6N TsrOJMMr/45V3a5iN9QYmSE0AT8pNjLNo09jOfmP6GhFin4fHZ8svOooad4TGjqFxRENlu Ic/WX4RdMeR75Zo13tcGVVOEwoSEDrA= Date: Wed, 1 Jul 2026 22:47:16 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH net-next v3 2/3] ptp: Add driver for R-Car Gen4 To: =?UTF-8?Q?Niklas_S=C3=B6derlund?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Richard Cochran , Andrew Lunn , "DavidS. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20260701090607.1108208-1-niklas.soderlund+renesas@ragnatech.se> <20260701090607.1108208-3-niklas.soderlund+renesas@ragnatech.se> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Vadim Fedorenko In-Reply-To: <20260701090607.1108208-3-niklas.soderlund+renesas@ragnatech.se> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT On 01/07/2026 10:06, Niklas Söderlund wrote: > Add driver for the gPTP timer found on R-Car Gen4 devices. The timer is > system-wide and shared by different Ethernet devices on each Gen4 > platform. The operation of the timer is however not completely in > depended of the systems Ethernet devices. > > - On R-Car S4 is gated by the RSWITCH Ethernet module clock. > > - On R-Car V4H is gated by the RTSN Ethernet module clock. > > - On R-Car V4M is gated by its own module clock, the system have > neither RTSN or RSWITCH device. But the module clock is the same as > RTSN on V4H and the documentation referees to it as tsn (EtherTSN). > > The gPTP device do have its own register space on all three platforms. > But on S4 and V4H it will share its clock and reset property with > RSWITCH or RTSN, respectively. > > Signed-off-by: Niklas Söderlund [...] > +static int ptp_rcar_gen4_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) > +{ > + struct ptp_rcar_gen4_priv *priv = ptp_to_priv(ptp); > + s64 addend = priv->default_addend; > + bool neg_adj = scaled_ppm < 0; > + unsigned long flags; > + s64 diff; > + > + if (neg_adj) > + scaled_ppm = -scaled_ppm; > + diff = div_s64(addend * scaled_ppm_to_ppb(scaled_ppm), NSEC_PER_SEC); > + addend = neg_adj ? addend - diff : addend + diff; > + > + spin_lock_irqsave(&priv->lock, flags); > + iowrite32(addend, priv->base + PTPTIVC0_REG); how are you so sure that addend will always fit into s32? It looks like it may go over in some cases, no? > + spin_unlock_irqrestore(&priv->lock, flags); > + > + return 0; > +}