From: Daniele Alessandrelli <daniele.alessandrelli@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
Mark Gross <mgross@linux.intel.com>,
Declan Murphy <declan.murphy@intel.com>,
daniele.alessandrelli@intel.com
Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings
Date: Tue, 10 Nov 2020 17:36:43 +0000 [thread overview]
Message-ID: <89bb5cd49a61d00c2d2f08a4b9273aaecd972ef8.camel@linux.intel.com> (raw)
In-Reply-To: <20201109161532.GA1382203@bogus>
On Mon, 2020-11-09 at 10:15 -0600, Rob Herring wrote:
> On Tue, Nov 03, 2020 at 06:49:23PM +0000, Daniele Alessandrelli wrote:
> > From: Declan Murphy <declan.murphy@intel.com>
> >
> > Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
> > (OCS) Hashing Control Unit (HCU) crypto driver.
> >
> > Signed-off-by: Declan Murphy <declan.murphy@intel.com>
> > Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> > Acked-by: Mark Gross <mgross@linux.intel.com>
> > ---
> > .../crypto/intel,keembay-ocs-hcu.yaml | 51 +++++++++++++++++++
> > 1 file changed, 51 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> > new file mode 100644
> > index 000000000000..cc03e2b66d5a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> > @@ -0,0 +1,51 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Intel Keem Bay OCS HCU Device Tree Bindings
> > +
> > +maintainers:
> > + - Declan Murphy <declan.murphy@intel.com>
> > + - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> > +
> > +description:
> > + The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
> > + provides hardware-accelerated hashing and HMAC.
> > +
> > +properties:
> > + compatible:
> > + const: intel,keembay-ocs-hcu
> > +
> > + reg:
> > + items:
> > + - description: The OCS HCU base register address
>
> Just need 'maxItems: 1' if there's only 1. The description doesn't add
> anything.
Thanks for the review. I will change this and the ones below.
>
> > +
> > + interrupts:
> > + items:
> > + - description: OCS HCU interrupt
>
> Same here
>
> > +
> > + clocks:
> > + items:
> > + - description: OCS clock
>
> And here.
>
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + crypto@3000b000 {
> > + compatible = "intel,keembay-ocs-hcu";
> > + reg = <0x3000b000 0x1000>;
> > + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&scmi_clk 94>;
> > + };
> > +
> > +...
> > --
> > 2.26.2
> >
next prev parent reply other threads:[~2020-11-10 17:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 18:49 [PATCH v2 0/3] crypto: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-11-03 18:49 ` [PATCH v2 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings Daniele Alessandrelli
2020-11-09 16:15 ` Rob Herring
2020-11-10 17:36 ` Daniele Alessandrelli [this message]
2020-11-03 18:49 ` [PATCH v2 2/3] crypto: keembay: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-11-03 18:49 ` [PATCH v2 3/3] MAINTAINERS: Add maintainers for " Daniele Alessandrelli
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