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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>,
	<matthias.bgg@gmail.com>
Cc: <jia-wei.chang@mediatek.com>, <roger.lu@mediatek.com>,
	<hsinyi@google.com>, <khilman@baylibre.com>,
	<angelogioacchino.delregno@collabora.com>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Andrew-sh . Cheng" <andrew-sh.cheng@mediatek.com>
Subject: Re: [PATCH v6 05/10] cpufreq: mediatek: Add opp notification support
Date: Fri, 6 May 2022 09:46:03 +0800	[thread overview]
Message-ID: <89dc58a34ea080ca50a94187e24cabc22aba3304.camel@mediatek.com> (raw)
In-Reply-To: <20220505115226.20130-6-rex-bc.chen@mediatek.com>

On Thu, 2022-05-05 at 19:52 +0800, Rex-BC Chen wrote:
> From this opp notifier, cpufreq should listen to opp notification and
> do

Hello Viresh,

There is still ">" in this patch...
I think the root cause could be the "From" word in the beginning of
this message.
I will not use "From" in next version..

BRs,
Rex

> proper actions when receiving events of disable and voltage
> adjustment.
> 
> One of the user for this opp notifier is MediaTek SVS.
> The MediaTek Smart Voltage Scaling (SVS) is a hardware which
> calculates
> suitable SVS bank voltages to OPP voltage table.
> 
> Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
> Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> ---
>  drivers/cpufreq/mediatek-cpufreq.c | 91 +++++++++++++++++++++++++++-
> --
>  1 file changed, 83 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/cpufreq/mediatek-cpufreq.c
> b/drivers/cpufreq/mediatek-cpufreq.c
> index fe205eca657d..06d80ee06bbf 100644
> --- a/drivers/cpufreq/mediatek-cpufreq.c
> +++ b/drivers/cpufreq/mediatek-cpufreq.c
> @@ -46,6 +46,11 @@ struct mtk_cpu_dvfs_info {
>  	int intermediate_voltage;
>  	bool need_voltage_tracking;
>  	int pre_vproc;
> +	/* Avoid race condition for regulators between notify and
> policy */
> +	struct mutex reg_lock;
> +	struct notifier_block opp_nb;
> +	unsigned int opp_cpu;
> +	unsigned long opp_freq;
>  	const struct mtk_cpufreq_platform_data *soc_data;
>  	int vtrack_max;
>  };
> @@ -182,6 +187,8 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  
>  	pre_freq_hz = clk_get_rate(cpu_clk);
>  
> +	mutex_lock(&info->reg_lock);
> +
>  	if (unlikely(info->pre_vproc <= 0))
>  		pre_vproc = regulator_get_voltage(info->proc_reg);
>  	else
> @@ -214,7 +221,7 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  			dev_err(cpu_dev,
>  				"cpu%d: failed to scale up voltage!\n",
> policy->cpu);
>  			mtk_cpufreq_set_voltage(info, pre_vproc);
> -			return ret;
> +			goto out;
>  		}
>  	}
>  
> @@ -224,8 +231,7 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  		dev_err(cpu_dev,
>  			"cpu%d: failed to re-parent cpu clock!\n",
> policy->cpu);
>  		mtk_cpufreq_set_voltage(info, pre_vproc);
> -		WARN_ON(1);
> -		return ret;
> +		goto out;
>  	}
>  
>  	/* Set the original PLL to target rate. */
> @@ -235,7 +241,7 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  			"cpu%d: failed to scale cpu clock rate!\n",
> policy->cpu);
>  		clk_set_parent(cpu_clk, armpll);
>  		mtk_cpufreq_set_voltage(info, pre_vproc);
> -		return ret;
> +		goto out;
>  	}
>  
>  	/* Set parent of CPU clock back to the original PLL. */
> @@ -244,8 +250,7 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  		dev_err(cpu_dev,
>  			"cpu%d: failed to re-parent cpu clock!\n",
> policy->cpu);
>  		mtk_cpufreq_set_voltage(info, inter_vproc);
> -		WARN_ON(1);
> -		return ret;
> +		goto out;
>  	}
>  
>  	/*
> @@ -260,15 +265,72 @@ static int mtk_cpufreq_set_target(struct
> cpufreq_policy *policy,
>  			clk_set_parent(cpu_clk, info->inter_clk);
>  			clk_set_rate(armpll, pre_freq_hz);
>  			clk_set_parent(cpu_clk, armpll);
> -			return ret;
> +			goto out;
>  		}
>  	}
>  
> -	return 0;
> +	info->opp_freq = freq_hz;
> +
> +out:
> +	mutex_unlock(&info->reg_lock);
> +
> +	return ret;
>  }
>  
>  #define DYNAMIC_POWER "dynamic-power-coefficient"
>  
> +static int mtk_cpufreq_opp_notifier(struct notifier_block *nb,
> +				    unsigned long event, void *data)
> +{
> +	struct dev_pm_opp *opp = data;
> +	struct dev_pm_opp *new_opp;
> +	struct mtk_cpu_dvfs_info *info;
> +	unsigned long freq, volt;
> +	struct cpufreq_policy *policy;
> +	int ret = 0;
> +
> +	info = container_of(nb, struct mtk_cpu_dvfs_info, opp_nb);
> +
> +	if (event == OPP_EVENT_ADJUST_VOLTAGE) {
> +		freq = dev_pm_opp_get_freq(opp);
> +
> +		mutex_lock(&info->reg_lock);
> +		if (info->opp_freq == freq) {
> +			volt = dev_pm_opp_get_voltage(opp);
> +			ret = mtk_cpufreq_set_voltage(info, volt);
> +			if (ret)
> +				dev_err(info->cpu_dev,
> +					"failed to scale voltage:
> %d\n", ret);
> +		}
> +		mutex_unlock(&info->reg_lock);
> +	} else if (event == OPP_EVENT_DISABLE) {
> +		freq = dev_pm_opp_get_freq(opp);
> +
> +		/* case of current opp item is disabled */
> +		if (info->opp_freq == freq) {
> +			freq = 1;
> +			new_opp = dev_pm_opp_find_freq_ceil(info-
> >cpu_dev,
> +							    &freq);
> +			if (IS_ERR(new_opp)) {
> +				dev_err(info->cpu_dev,
> +					"all opp items are
> disabled\n");
> +				ret = PTR_ERR(new_opp);
> +				return notifier_from_errno(ret);
> +			}
> +
> +			dev_pm_opp_put(new_opp);
> +			policy = cpufreq_cpu_get(info->opp_cpu);
> +			if (policy) {
> +				cpufreq_driver_target(policy, freq /
> 1000,
> +						      CPUFREQ_RELATION_
> L);
> +				cpufreq_cpu_put(policy);
> +			}
> +		}
> +	}
> +
> +	return notifier_from_errno(ret);
> +}
> +
>  static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info,
> int cpu)
>  {
>  	struct device *cpu_dev;
> @@ -357,6 +419,18 @@ static int mtk_cpu_dvfs_info_init(struct
> mtk_cpu_dvfs_info *info, int cpu)
>  	info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
>  	dev_pm_opp_put(opp);
>  
> +	mutex_init(&info->reg_lock);
> +
> +	info->opp_cpu = cpu;
> +	info->opp_nb.notifier_call = mtk_cpufreq_opp_notifier;
> +	ret = dev_pm_opp_register_notifier(cpu_dev, &info->opp_nb);
> +	if (ret) {
> +		dev_err(cpu_dev, "cpu%d: failed to register opp
> notifier\n", cpu);
> +		goto out_disable_inter_clock;
> +	}
> +
> +	info->opp_freq = clk_get_rate(info->cpu_clk);
> +
>  	/*
>  	 * If SRAM regulator is present, software "voltage tracking" is
> needed
>  	 * for this CPU power domain.
> @@ -421,6 +495,7 @@ static void mtk_cpu_dvfs_info_release(struct
> mtk_cpu_dvfs_info *info)
>  	}
>  
>  	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
> +	dev_pm_opp_unregister_notifier(info->cpu_dev, &info->opp_nb);
>  }
>  
>  static int mtk_cpufreq_init(struct cpufreq_policy *policy)


  reply	other threads:[~2022-05-06  1:46 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 11:52 [PATCH v6 00/10] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 01/10] dt-bindings: cpufreq: mediatek: Add MediaTek CCI property Rex-BC Chen
2022-05-11 14:37   ` Rob Herring
2022-05-05 11:52 ` [PATCH v6 02/10] cpufreq: mediatek: Add platform_device_unregister when driver exit Rex-BC Chen
2022-05-05 15:04   ` AngeloGioacchino Del Regno
2022-05-06  1:49     ` Rex-BC Chen
2022-05-06  4:09   ` Viresh Kumar
2022-05-05 11:52 ` [PATCH v6 03/10] cpufreq: mediatek: Move voltage limits to platform data Rex-BC Chen
2022-05-06  4:10   ` Viresh Kumar
2022-05-05 11:52 ` [PATCH v6 04/10] cpufreq: mediatek: Refine mtk_cpufreq_voltage_tracking() Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 05/10] cpufreq: mediatek: Add opp notification support Rex-BC Chen
2022-05-06  1:46   ` Rex-BC Chen [this message]
2022-05-06  3:22     ` Chen-Yu Tsai
2022-05-06  3:32       ` Viresh Kumar
2022-05-06  4:15   ` Viresh Kumar
2022-05-06  6:21     ` Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 06/10] cpufreq: mediatek: Link CCI device to CPU Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 07/10] cpufreq: mediatek: Add support for MT8186 Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 08/10] arm64: dts: mediatek: Add opp table and clock property for MT8183 cpufreq Rex-BC Chen
2022-05-12  6:11   ` Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 09/10] arm64: dts: mediatek: Add MediaTek CCI node for MT8183 Rex-BC Chen
2022-05-16  5:35   ` Chen-Yu Tsai
2022-05-16 10:41     ` Rex-BC Chen
2022-05-05 11:52 ` [PATCH v6 10/10] arm64: dts: mediatek: Add mediatek,cci property for MT8183 cpufreq Rex-BC Chen
2022-05-06  4:20 ` [PATCH v6 00/10] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Viresh Kumar
2022-05-06  6:32   ` Rex-BC Chen
2022-05-12  5:27     ` Viresh Kumar
2022-05-12  5:33       ` Rex-BC Chen
2022-05-12  5:48         ` Viresh Kumar
2022-05-12  6:05           ` Rex-BC Chen
2022-05-17  9:57             ` Matthias Brugger
2022-05-17 10:02               ` Rex-BC Chen

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