Re: [PATCH 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

On 13 December 2022 14:49:05 EET, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
>
>On 13.12.2022 13:38, Bhupesh Sharma wrote:
>> Add USB superspeed qmp phy node to dtsi.
>> 
>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
>> ---
>Please run make dtbs_check before sending dt patches, this one
>introduces new errors.
>
>
>>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++++++++++--
>>  1 file changed, 36 insertions(+), 2 deletions(-)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> index e4ce135264f3d..9c5c024919f92 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> @@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 {
>>  			status = "disabled";
>>  		};
>>  
>> +		usb_qmpphy: phy@1615000 {
>> +			compatible = "qcom,sm6115-qmp-usb3-phy";
>> +			reg = <0x01615000 0x200>;
>> +			#clock-cells = <1>;
>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +			ranges;
>These -cells and ranges properties could go after status=disabled
>
>Konrad
>> +			clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
>> +				 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>> +				 <&gcc GCC_AHB2PHY_USB_CLK>;
>> +			clock-names = "com_aux",
>> +				      "ref",
>> +				      "cfg_ahb";
>> +			resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
>> +				 <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
>> +			reset-names = "phy", "phy_phy";
>> +			status = "disabled";
>> +
>> +			usb_ssphy: phy@1615200 {

We should not introduce additional qmp-with-child PHY nodes.


>> +				reg = <0x01615200 0x200>,
>> +				      <0x01615400 0x200>,
>> +				      <0x01615c00 0x400>,
>> +				      <0x01615600 0x200>,
>> +				      <0x01615800 0x200>,
>> +				      <0x01615a00 0x100>;
>> +				#phy-cells = <0>;
>> +				#clock-cells = <1>;
>> +				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
>> +				clock-names = "pipe0";
>> +				clock-output-names = "usb3_phy_pipe_clk_src";
>> +			};
>> +		};
>> +
>> +
>>  		qfprom@1b40000 {
>>  			compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
>>  			reg = <0x01b40000 0x7000>;
>> @@ -1023,8 +1057,8 @@ usb_dwc3: usb@4e00000 {
>>  				compatible = "snps,dwc3";
>>  				reg = <0x04e00000 0xcd00>;
>>  				interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
>> -				phys = <&usb_hsphy>;
>> -				phy-names = "usb2-phy";
>> +				phys = <&usb_hsphy>, <&usb_ssphy>;
>> +				phy-names = "usb2-phy", "usb3-phy";
>>  				iommus = <&apps_smmu 0x120 0x0>;
>>  				snps,dis_u2_susphy_quirk;
>>  				snps,dis_enblslpm_quirk;

-- 
With best wishes
Dmitry